drm/i915/xehp: Correct steering initialization
authorMatt Roper <matthew.d.roper@intel.com>
Tue, 7 Jun 2022 17:57:16 +0000 (10:57 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 8 Jun 2022 14:25:58 +0000 (07:25 -0700)
Another mistake during the conversion to DSS bitmaps:  after retrieving
the DSS ID intel_sseu_find_first_xehp_dss() we forgot to modulo it down
to obtain which ID within the current gslice it is.

Fixes: b87d39019651 ("drm/i915/sseu: Disassociate internal subslice mask representation from uapi")
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220607175716.3338661-1-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c

index aeadbb3..1ee54a8 100644 (file)
@@ -1177,8 +1177,8 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal)
        }
 
        slice = __ffs(slice_mask);
-       subslice = intel_sseu_find_first_xehp_dss(sseu, GEN_DSS_PER_GSLICE, slice);
-       WARN_ON(subslice > GEN_DSS_PER_GSLICE);
+       subslice = intel_sseu_find_first_xehp_dss(sseu, GEN_DSS_PER_GSLICE, slice) %
+               GEN_DSS_PER_GSLICE;
 
        __add_mcr_wa(gt, wal, slice, subslice);