dt-bindings: mfd: brcm,cru: Add clkset syscon
authorRafał Miłecki <rafal@milecki.pl>
Mon, 13 Sep 2021 08:00:21 +0000 (10:00 +0200)
committerLee Jones <lee.jones@linaro.org>
Fri, 5 Nov 2021 14:38:51 +0000 (14:38 +0000)
CRU has a shared register that is used e.g. to control USB 2.0 PHY block
access. It's a single 32 b register. Document it as syscon so it can be
used with a regmap.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Documentation/devicetree/bindings/mfd/brcm,cru.yaml
Documentation/devicetree/bindings/mfd/syscon.yaml

index fc1317a..bf4e585 100644 (file)
@@ -39,6 +39,9 @@ patternProperties:
   '^clock-controller@[a-f0-9]+$':
     $ref: ../clock/brcm,iproc-clocks.yaml
 
+  '^syscon@[a-f0-9]+$':
+    $ref: syscon.yaml
+
   '^thermal@[a-f0-9]+$':
     $ref: ../thermal/brcm,ns-thermal.yaml
 
@@ -73,6 +76,11 @@ examples:
                                  "iprocfast", "sata1", "sata2";
         };
 
+        syscon@180 {
+            compatible = "brcm,cru-clkset", "syscon";
+            reg = <0x180 0x4>;
+        };
+
         pinctrl {
             compatible = "brcm,bcm4708-pinmux";
             offset = <0x1c0>;
index abe3fd8..0dcffc2 100644 (file)
@@ -38,6 +38,7 @@ properties:
               - allwinner,sun8i-h3-system-controller
               - allwinner,sun8i-v3s-system-controller
               - allwinner,sun50i-a64-system-controller
+              - brcm,cru-clkset
               - hisilicon,dsa-subctrl
               - hisilicon,hi6220-sramctrl
               - hisilicon,pcie-sas-subctrl