ARM: dts: berlin2q: move PMU node from soc to root
authorJisheng Zhang <Jisheng.Zhang@synaptics.com>
Tue, 15 May 2018 10:16:23 +0000 (18:16 +0800)
committerJisheng Zhang <Jisheng.Zhang@synaptics.com>
Thu, 24 May 2018 07:25:44 +0000 (15:25 +0800)
Fix "make dtbs W=1" warns about missing reg or ranges property.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
arch/arm/boot/dts/berlin2q.dtsi

index 82e1760..516a7ce 100644 (file)
                };
        };
 
+       pmu {
+               compatible = "arm,cortex-a9-pmu";
+               interrupt-parent = <&gic>;
+               interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&cpu0>,
+                                    <&cpu1>,
+                                    <&cpu2>,
+                                    <&cpu3>;
+       };
+
        refclk: oscillator {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                ranges = <0 0xf7000000 0x1000000>;
                interrupt-parent = <&gic>;
 
-               pmu {
-                       compatible = "arm,cortex-a9-pmu";
-                       interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-affinity = <&cpu0>,
-                                            <&cpu1>,
-                                            <&cpu2>,
-                                            <&cpu3>;
-               };
-
                sdhci0: sdhci@ab0000 {
                        compatible = "mrvl,pxav3-mmc";
                        reg = <0xab0000 0x200>;