arm64: dts: renesas: rzg3s-smarc-som: Guard Ethernet IRQ GPIO hogs

Ethernet IRQ GPIOs are marked as GPIO hogs.  Thus, these GPIOs are
requested at probe time without considering if there are other
peripherals that need them.  The Ethernet IRQ GPIOs are shared with
SDHI2.  Selection between Ethernet and SDHI2 is done through a hardware
switch.  To avoid scenarios where one wants to boot with SDHI2 support
and some SDHI pins are not propertly configured because of the GPIO
hogs, guard the Ethernet IRQ GPIO hogs with the proper build flag.

Fixes: 932ff0c802c6 ("arm64: dts: renesas: rzg3s-smarc-som: Enable the Ethernet interfaces")
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240208124300.2740313-13-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
index 2b7fa58..acac466 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
@@ -193,12 +193,14 @@
 #endif
 
 &pinctrl {
+#if SW_CONFIG3 == SW_ON
        eth0-phy-irq-hog {
                gpio-hog;
                gpios = <RZG2L_GPIO(12, 0) GPIO_ACTIVE_LOW>;
                input;
                line-name = "eth0-phy-irq";
        };
+#endif
 
        eth0_pins: eth0 {
                txc {
@@ -234,12 +236,14 @@
                };
        };
 
+#if SW_CONFIG3 == SW_ON
        eth1-phy-irq-hog {
                gpio-hog;
                gpios = <RZG2L_GPIO(12, 1) GPIO_ACTIVE_LOW>;
                input;
                line-name = "eth1-phy-irq";
        };
+#endif
 
        eth1_pins: eth1 {
                txc {