arm64: dts: qcom: hamoa: Fix incomplete Root Port property migration

Historically, the Qualcomm PCIe controller node (Host bridge) described
all Root Port properties, such as PHY, PERST#, and WAKE#. But to provide
a more accurate hardware description and to support future multi-Root Port
controllers, these properties were moved to the Root Port node in the
devicetree bindings.

Commit 960609b22be5 ("arm64: dts: qcom: hamoa: Move PHY, PERST, and Wake
GPIOs to PCIe port nodes and add port Nodes for all PCIe ports")
initiated this transition for the Hamoa platform by moving the PHY
property to the Root Port node in hamoa.dtsi. However, it only updated
some platform specific DTS files for PERST# and WAKE#, leaving others in
a "mixed" binding state.

While the PCIe controller driver supports both legacy and Root Port
bindings, It cannot correctly handle a mix of both. In these cases, the
driver parses the PHY from the Root Port node, but fails to find the
PERST# property (which it then assumes is not present, as it is optional).
Consequently, the controller probe succeeds, but PERST# remains
uncontrolled, preventing PCIe endpoints from functioning.

So, fix the incomplete migration by moving the PERST# and WAKE# properties
from the controller node to the Root Port node in all remaining Hamoa
platform DTS files.

Fixes: 960609b22be5 ("arm64: dts: qcom: hamoa: Move PHY, PERST, and Wake GPIOs to PCIe port nodes and add port Nodes for all PCIe ports")
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260330020934.3501247-1-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi b/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi
index 8e5c557..0a382cc 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi
@@ -1032,9 +1032,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -1048,10 +1045,12 @@
        status = "okay";
 };
 
-&pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+&pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+};
 
+&pcie6a {
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -1067,6 +1066,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";

diff --git a/arch/arm64/boot/dts/qcom/x1-crd.dtsi b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
index ded96fb..2fbf9ec 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1-crd.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
@@ -1216,15 +1216,17 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
        status = "okay";
 };
 
+&pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+};
+
 &pcie4_phy {
        vdda-phy-supply = <&vreg_l3i_0p8>;
        vdda-pll-supply = <&vreg_l3e_1p2>;
@@ -1233,9 +1235,6 @@
 };
 
 &pcie5 {
-       perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_wwan>;
 
        pinctrl-0 = <&pcie5_default>;
@@ -1251,10 +1250,12 @@
        status = "okay";
 };
 
-&pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+&pcie5_port0 {
+       reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
+};
 
+&pcie6a {
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-names = "default";
@@ -1270,6 +1271,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        kypd_vol_up_n: kypd-vol-up-n-state {
                pins = "gpio6";

diff --git a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi b/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi
index bf04a12..217ca8c 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi
@@ -1081,9 +1081,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -1098,6 +1095,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;
@@ -1115,9 +1115,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -1126,6 +1123,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pcie6a_phy {
        vdda-phy-supply = <&vreg_l1d_0p8>;
        vdda-pll-supply = <&vreg_l2j_1p2>;

diff --git a/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi b/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi
index a407543..4106394 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi
@@ -1065,9 +1065,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -1082,6 +1079,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;
@@ -1099,9 +1099,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -1110,6 +1107,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pcie6a_phy {
        vdda-phy-supply = <&vreg_l1d_0p8>;
        vdda-pll-supply = <&vreg_l2j_1p2>;

diff --git a/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi b/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi
index d77be02..ba6b7b5 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi
@@ -964,9 +964,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -982,6 +979,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
index d6472e5..d7938d3 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
@@ -1126,9 +1126,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -1143,6 +1140,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts b/arch/arm64/boot/dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts
index 20a33e6..eec5f2f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts
@@ -1033,9 +1033,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -1050,6 +1047,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;
@@ -1067,10 +1067,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -1086,6 +1082,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";

diff --git a/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts b/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts
index 1e5eb8c..06747b5 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts
+++ b/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts
@@ -1131,9 +1131,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -1148,6 +1145,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;
@@ -1165,9 +1165,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -1183,6 +1180,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_pwm {
        status = "okay";
 };