Pulled some init out of main per-GPC/TPC loops to match RM.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
return 0;
}
+void
+gf100_gr_init_419cc0(struct gf100_gr *gr)
+{
+ struct nvkm_device *device = gr->base.engine.subdev.device;
+ int gpc, tpc;
+
+ nvkm_mask(device, 0x419cc0, 0x00000008, 0x00000008);
+
+ for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
+ for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++)
+ nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
+ }
+}
+
void
gf100_gr_init_40601c(struct gf100_gr *gr)
{
nvkm_wr32(device, 0x405840, 0xc0000000);
nvkm_wr32(device, 0x405844, 0x00ffffff);
- nvkm_mask(device, 0x419cc0, 0x00000008, 0x00000008);
+
+ if (gr->func->init_419cc0)
+ gr->func->init_419cc0(gr);
+
nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);
for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
- nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
+ .init_419cc0 = gf100_gr_init_419cc0,
.mmio = gf100_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
void (*init_ds_hww_esr_2)(struct gf100_gr *);
void (*init_40601c)(struct gf100_gr *);
void (*init_sked_hww_esr)(struct gf100_gr *);
+ void (*init_419cc0)(struct gf100_gr *);
void (*init_ppc_exceptions)(struct gf100_gr *);
void (*set_hww_esr_report_mask)(struct gf100_gr *);
const struct gf100_gr_pack *mmio;
void gf100_gr_init_num_active_ltcs(struct gf100_gr *);
void gf100_gr_init_fecs_exceptions(struct gf100_gr *);
void gf100_gr_init_40601c(struct gf100_gr *);
+void gf100_gr_init_419cc0(struct gf100_gr *);
void gf117_gr_init_zcull(struct gf100_gr *);
.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
+ .init_419cc0 = gf100_gr_init_419cc0,
.mmio = gf104_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
+ .init_419cc0 = gf100_gr_init_419cc0,
.mmio = gf108_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
+ .init_419cc0 = gf100_gr_init_419cc0,
.mmio = gf110_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
+ .init_419cc0 = gf100_gr_init_419cc0,
.mmio = gf117_gr_pack_mmio,
.fecs.ucode = &gf117_gr_fecs_ucode,
.gpccs.ucode = &gf117_gr_gpccs_ucode,
.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_40601c = gf100_gr_init_40601c,
+ .init_419cc0 = gf100_gr_init_419cc0,
.mmio = gf119_gr_pack_mmio,
.fecs.ucode = &gf100_gr_fecs_ucode,
.gpccs.ucode = &gf100_gr_gpccs_ucode,
gr->func->init_sked_hww_esr(gr);
nvkm_wr32(device, 0x405840, 0xc0000000);
nvkm_wr32(device, 0x405844, 0x00ffffff);
- nvkm_mask(device, 0x419cc0, 0x00000008, 0x00000008);
+ gr->func->init_419cc0(gr);
nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);
gr->func->init_ppc_exceptions(gr);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
- nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
.init_fecs_exceptions = gk104_gr_init_fecs_exceptions,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.mmio = gk104_gr_pack_mmio,
.fecs.ucode = &gk104_gr_fecs_ucode,
.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.mmio = gk110_gr_pack_mmio,
.fecs.ucode = &gk110_gr_fecs_ucode,
.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.mmio = gk110b_gr_pack_mmio,
.fecs.ucode = &gk110_gr_fecs_ucode,
.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.mmio = gk208_gr_pack_mmio,
.fecs.ucode = &gk208_gr_fecs_ucode,
gr->func->init_sked_hww_esr(gr);
nvkm_wr32(device, 0x405840, 0xc0000000);
nvkm_wr32(device, 0x405844, 0x00ffffff);
- nvkm_mask(device, 0x419cc0, 0x00000008, 0x00000008);
+ gr->func->init_419cc0(gr);
gr->func->init_ppc_exceptions(gr);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
- nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
.init_bios_2 = gm107_gr_init_bios_2,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.mmio = gm107_gr_pack_mmio,
.fecs.ucode = &gm107_gr_fecs_ucode,
gr->func->init_sked_hww_esr(gr);
nvkm_wr32(device, 0x405840, 0xc0000000);
nvkm_wr32(device, 0x405844, 0x00ffffff);
- nvkm_mask(device, 0x419cc0, 0x00000008, 0x00000008);
+ gr->func->init_419cc0(gr);
gr->func->init_ppc_exceptions(gr);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
- nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
.init_ds_hww_esr_2 = gm200_gr_init_ds_hww_esr_2,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.rops = gm200_gr_rops,
.ppc_nr = 2,
gr->func->init_sked_hww_esr(gr);
nvkm_wr32(device, 0x405840, 0xc0000000);
nvkm_wr32(device, 0x405844, 0x00ffffff);
- nvkm_mask(device, 0x419cc0, 0x00000008, 0x00000008);
+ gr->func->init_419cc0(gr);
nvkm_mask(device, 0x419c9c, 0x00010000, 0x00010000);
nvkm_mask(device, 0x419c9c, 0x00020000, 0x00020000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
- nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
.init_fecs_exceptions = gp100_gr_init_fecs_exceptions,
.init_ds_hww_esr_2 = gm200_gr_init_ds_hww_esr_2,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.rops = gm200_gr_rops,
.ppc_nr = 2,
.init_fecs_exceptions = gp100_gr_init_fecs_exceptions,
.init_ds_hww_esr_2 = gm200_gr_init_ds_hww_esr_2,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.rops = gm200_gr_rops,
.ppc_nr = 3,
.init_fecs_exceptions = gp100_gr_init_fecs_exceptions,
.init_ds_hww_esr_2 = gm200_gr_init_ds_hww_esr_2,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.rops = gm200_gr_rops,
.ppc_nr = 1,
.init_fecs_exceptions = gp100_gr_init_fecs_exceptions,
.init_ds_hww_esr_2 = gm200_gr_init_ds_hww_esr_2,
.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
+ .init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.rops = gm200_gr_rops,
.ppc_nr = 1,