EDAC, ghes: Model a single, logical memory controller

We're enumerating the DIMMs through a DMI walk and since we can't get
any more detailed topological information about which DIMMs belong to
which memory controller, convert it to a single, logical controller
which contains all the DIMMs.

The error reporting path from GHES ghes_edac_report_mem_error() doesn't
get called in NMI context but add a warning about it to catch any
changes in the future as if so, our locking scheme will be insufficient
then.

Signed-off-by: Borislav Petkov <bp@suse.de>

diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c
index 8acdf29..8d904df 100644 (file)
--- a/drivers/edac/ghes_edac.c
+++ b/drivers/edac/ghes_edac.c
@@ -28,10 +28,15 @@ struct ghes_edac_pvt {
        char msg[80];
 };
 
-static LIST_HEAD(ghes_reglist);
-static DEFINE_MUTEX(ghes_edac_lock);
-static int ghes_edac_mc_num;
+static atomic_t ghes_init = ATOMIC_INIT(0);
+static struct ghes_edac_pvt *ghes_pvt;
 
+/*
+ * Sync with other, potentially concurrent callers of
+ * ghes_edac_report_mem_error(). We don't know what the
+ * "inventive" firmware would do.
+ */
+static DEFINE_SPINLOCK(ghes_lock);
 
 /* Memory Device - Type 17 of SMBIOS spec */
 struct memdev_dmi_entry {
@@ -169,18 +174,26 @@ void ghes_edac_report_mem_error(struct ghes *ghes, int sev,
        enum hw_event_mc_err_type type;
        struct edac_raw_error_desc *e;
        struct mem_ctl_info *mci;
-       struct ghes_edac_pvt *pvt = NULL;
+       struct ghes_edac_pvt *pvt = ghes_pvt;
+       unsigned long flags;
        char *p;
        u8 grain_bits;
 
-       list_for_each_entry(pvt, &ghes_reglist, list) {
-               if (ghes == pvt->ghes)
-                       break;
-       }
        if (!pvt) {
                pr_err("Internal error: Can't find EDAC structure\n");
                return;
        }
+
+       /*
+        * We can do the locking below because GHES defers error processing
+        * from NMI to IRQ context. Whenever that changes, we'd at least
+        * know.
+        */
+       if (WARN_ON_ONCE(in_nmi()))
+               return;
+
+       spin_lock_irqsave(&ghes_lock, flags);
+
        mci = pvt->mci;
        e = &mci->error_desc;
 
@@ -398,8 +411,8 @@ void ghes_edac_report_mem_error(struct ghes *ghes, int sev,
                       (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
                       grain_bits, e->syndrome, pvt->detail_location);
 
-       /* Report the error via EDAC API */
        edac_raw_mc_handle_error(type, mci, e);
+       spin_unlock_irqrestore(&ghes_lock, flags);
 }
 
 int ghes_edac_register(struct ghes *ghes, struct device *dev)
@@ -408,9 +421,14 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
        int rc, num_dimm = 0;
        struct mem_ctl_info *mci;
        struct edac_mc_layer layers[1];
-       struct ghes_edac_pvt *pvt;
        struct ghes_edac_dimm_fill dimm_fill;
 
+       /*
+        * We have only one logical memory controller to which all DIMMs belong.
+        */
+       if (atomic_inc_return(&ghes_init) > 1)
+               return 0;
+
        /* Get the number of DIMMs */
        dmi_walk(ghes_edac_count_dimms, &num_dimm);
 
@@ -424,26 +442,17 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
        layers[0].size = num_dimm;
        layers[0].is_virt_csrow = true;
 
-       /*
-        * We need to serialize edac_mc_alloc() and edac_mc_add_mc(),
-        * to avoid duplicated memory controller numbers
-        */
-       mutex_lock(&ghes_edac_lock);
-       mci = edac_mc_alloc(ghes_edac_mc_num, ARRAY_SIZE(layers), layers,
-                           sizeof(*pvt));
+       mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct ghes_edac_pvt));
        if (!mci) {
                pr_info("Can't allocate memory for EDAC data\n");
-               mutex_unlock(&ghes_edac_lock);
                return -ENOMEM;
        }
 
-       pvt = mci->pvt_info;
-       memset(pvt, 0, sizeof(*pvt));
-       list_add_tail(&pvt->list, &ghes_reglist);
-       pvt->ghes = ghes;
-       pvt->mci  = mci;
-       mci->pdev = dev;
+       ghes_pvt        = mci->pvt_info;
+       ghes_pvt->ghes  = ghes;
+       ghes_pvt->mci   = mci;
 
+       mci->pdev = dev;
        mci->mtype_cap = MEM_FLAG_EMPTY;
        mci->edac_ctl_cap = EDAC_FLAG_NONE;
        mci->edac_cap = EDAC_FLAG_NONE;
@@ -451,36 +460,23 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
        mci->ctl_name = "ghes_edac";
        mci->dev_name = "ghes";
 
-       if (!ghes_edac_mc_num) {
-               if (!fake) {
-                       pr_info("This EDAC driver relies on BIOS to enumerate memory and get error reports.\n");
-                       pr_info("Unfortunately, not all BIOSes reflect the memory layout correctly.\n");
-                       pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
-                       pr_info("If you find incorrect reports, please contact your hardware vendor\n");
-                       pr_info("to correct its BIOS.\n");
-                       pr_info("This system has %d DIMM sockets.\n",
-                               num_dimm);
-               } else {
-                       pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
-                       pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
-                       pr_info("work on such system. Use this driver with caution\n");
-               }
+       if (!fake) {
+               pr_info("This EDAC driver relies on BIOS to enumerate memory and get error reports.\n");
+               pr_info("Unfortunately, not all BIOSes reflect the memory layout correctly.\n");
+               pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
+               pr_info("If you find incorrect reports, please contact your hardware vendor\n");
+               pr_info("to correct its BIOS.\n");
+               pr_info("This system has %d DIMM sockets.\n", num_dimm);
+       } else {
+               pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
+               pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
+               pr_info("work on such system. Use this driver with caution\n");
        }
 
        if (!fake) {
-               /*
-                * Fill DIMM info from DMI for the memory controller #0
-                *
-                * Keep it in blank for the other memory controllers, as
-                * there's no reliable way to properly credit each DIMM to
-                * the memory controller, as different BIOSes fill the
-                * DMI bank location fields on different ways
-                */
-               if (!ghes_edac_mc_num) {
-                       dimm_fill.count = 0;
-                       dimm_fill.mci = mci;
-                       dmi_walk(ghes_edac_dmidecode, &dimm_fill);
-               }
+               dimm_fill.count = 0;
+               dimm_fill.mci = mci;
+               dmi_walk(ghes_edac_dmidecode, &dimm_fill);
        } else {
                struct dimm_info *dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,
                                                       mci->n_layers, 0, 0, 0);
@@ -496,26 +492,16 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
        if (rc < 0) {
                pr_info("Can't register at EDAC core\n");
                edac_mc_free(mci);
-               mutex_unlock(&ghes_edac_lock);
                return -ENODEV;
        }
-
-       ghes_edac_mc_num++;
-       mutex_unlock(&ghes_edac_lock);
        return 0;
 }
 
 void ghes_edac_unregister(struct ghes *ghes)
 {
        struct mem_ctl_info *mci;
-       struct ghes_edac_pvt *pvt, *tmp;
-
-       list_for_each_entry_safe(pvt, tmp, &ghes_reglist, list) {
-               if (ghes == pvt->ghes) {
-                       mci = pvt->mci;
-                       edac_mc_del_mc(mci->pdev);
-                       edac_mc_free(mci);
-                       list_del(&pvt->list);
-               }
-       }
+
+       mci = ghes_pvt->mci;
+       edac_mc_del_mc(mci->pdev);
+       edac_mc_free(mci);
 }