staging: rtl8712: Fix multiple blank lines warning from .h files
authorSathish Kumar <skumark1902@gmail.com>
Mon, 4 Apr 2022 03:47:06 +0000 (09:17 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 4 Apr 2022 14:34:31 +0000 (16:34 +0200)
This patch fixes the checkpatch.pl warnings like:
CHECK: Please don't use multiple blank lines
+
+
from rtl8712_*.h, rtl871x_*.h, sta_info.h, and wifi.h

Signed-off-by: Sathish Kumar <skumark1902@gmail.com>
Link: https://lore.kernel.org/r/20220404034706.2384-1-skumark1902@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
16 files changed:
drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h
drivers/staging/rtl8712/rtl8712_macsetting_bitdef.h
drivers/staging/rtl8712/rtl8712_macsetting_regdef.h
drivers/staging/rtl8712/rtl8712_ratectrl_regdef.h
drivers/staging/rtl8712/rtl8712_security_bitdef.h
drivers/staging/rtl8712/rtl8712_spec.h
drivers/staging/rtl8712/rtl8712_syscfg_bitdef.h
drivers/staging/rtl8712/rtl8712_syscfg_regdef.h
drivers/staging/rtl8712/rtl8712_timectrl_bitdef.h
drivers/staging/rtl8712/rtl8712_wmac_bitdef.h
drivers/staging/rtl8712/rtl871x_cmd.h
drivers/staging/rtl8712/rtl871x_ioctl.h
drivers/staging/rtl8712/rtl871x_mp_ioctl.h
drivers/staging/rtl8712/rtl871x_mp_phy_regdef.h
drivers/staging/rtl8712/sta_info.h
drivers/staging/rtl8712/wifi.h

index e125c72..68bdec0 100644 (file)
@@ -91,6 +91,5 @@
 #define        _BCNSPACE_MSK                   0x0FFF
 #define        _BCNSPACE_SHT                   0
 
-
 #endif /* __RTL8712_CMDCTRL_BITDEF_H__*/
 
index 3d9f40f..46d758d 100644 (file)
@@ -7,7 +7,6 @@
 #ifndef __RTL8712_MACSETTING_BITDEF_H__
 #define __RTL8712_MACSETTING_BITDEF_H__
 
-
 /*MACID*/
 /*BSSID*/
 
@@ -28,7 +27,5 @@
 
 /*BUILDUSER*/
 
-
-
 #endif /* __RTL8712_MACSETTING_BITDEF_H__*/
 
index e8cb2ee..64740d9 100644 (file)
@@ -16,7 +16,5 @@
 #define BUILDTIME                      (RTL8712_MACIDSETTING_ + 0x0024)
 #define BUILDUSER                      (RTL8712_MACIDSETTING_ + 0x0028)
 
-
-
 #endif /*__RTL8712_MACSETTING_REGDEF_H__*/
 
index a3eaee0..9ed5653 100644 (file)
@@ -39,6 +39,5 @@
 #define MCS_TXAGC7                     (RTL8712_RATECTRL_ + 0x67)
 #define CCK_TXAGC                      (RTL8712_RATECTRL_ + 0x68)
 
-
 #endif /*__RTL8712_RATECTRL_REGDEF_H__*/
 
index 1c26a7e..44275ef 100644 (file)
@@ -30,6 +30,5 @@
 #define        _RXUSEDK                                        BIT(1)
 #define        _TXUSEDK                                        BIT(0)
 
-
 #endif /*__RTL8712_SECURITY_BITDEF_H__*/
 
index c0bab4c..613a410 100644 (file)
@@ -30,7 +30,6 @@
 
 #define RTL8712_IOBASE_FF      0x10300000 /*IOBASE_FIFO 0x1031000~0x103AFFFF*/
 
-
 /*IOREG Offset for 8712*/
 #define RTL8712_SYSCFG_                RTL8712_IOBASE_IOREG
 #define RTL8712_CMDCTRL_       (RTL8712_IOBASE_IOREG + 0x40)
@@ -47,7 +46,6 @@
 #define RTL8712_DEBUGCTRL_     (RTL8712_IOBASE_IOREG + 0x310)
 #define RTL8712_OFFLOAD_       (RTL8712_IOBASE_IOREG + 0x2D0)
 
-
 /*FIFO for 8712*/
 #define RTL8712_DMA_BCNQ       (RTL8712_IOBASE_FF + 0x10000)
 #define RTL8712_DMA_MGTQ       (RTL8712_IOBASE_FF + 0x20000)
@@ -60,7 +58,6 @@
 #define RTL8712_DMA_H2CCMD     (RTL8712_IOBASE_FF + 0x90000)
 #define RTL8712_DMA_C2HCMD     (RTL8712_IOBASE_FF + 0xA0000)
 
-
 /*------------------------------*/
 
 /*BIT 16 15*/
index a328ca9..d92df3f 100644 (file)
                                                       * Block's Bandgap.
                                                       */
 
-
 /*--------------------------------------------------------------------------*/
 /*       SPS1_CTRL bits                                (Offset 0x18-1E, 56bits)*/
 /*--------------------------------------------------------------------------*/
 #define        SPS1_SWEN               BIT(1)  /* Enable vsps18 SW Macro Block.*/
 #define        SPS1_LDEN               BIT(0)  /* Enable VSPS12 LDO Macro block.*/
 
-
 /*----------------------------------------------------------------------------*/
 /*       LDOA15_CTRL bits              (Offset 0x20, 8bits)*/
 /*----------------------------------------------------------------------------*/
 #define        LDA15_EN                BIT(0)  /* Enable LDOA15 Macro Block*/
 
-
 /*----------------------------------------------------------------------------*/
 /*       8192S LDOV12D_CTRL bit                (Offset 0x21, 8bits)*/
 /*----------------------------------------------------------------------------*/
 /*CLK_PS_CTRL*/
 #define        _CLK_GATE_EN            BIT(0)
 
-
 /* EFUSE_CTRL*/
 #define EF_FLAG                        BIT(31)         /* Access Flag, Write:1;
                                                 *              Read:0
index e95eb58..da5efcd 100644 (file)
@@ -14,7 +14,6 @@
 #ifndef __RTL8712_SYSCFG_REGDEF_H__
 #define __RTL8712_SYSCFG_REGDEF_H__
 
-
 #define SYS_ISO_CTRL           (RTL8712_SYSCFG_ + 0x0000)
 #define SYS_FUNC_EN            (RTL8712_SYSCFG_ + 0x0002)
 #define PMC_FSM                        (RTL8712_SYSCFG_ + 0x0004)
@@ -39,6 +38,5 @@
 #define RCLK_MON               (RTL8712_SYSCFG_ + 0x003E)
 #define EFUSE_CLK_CTRL         (RTL8712_SYSCFG_ + 0x02F8)
 
-
 #endif /*__RTL8712_SYSCFG_REGDEF_H__*/
 
index d3b45c6..ea164e4 100644 (file)
@@ -45,6 +45,5 @@
 #define        _RPT_CNT_MSK                    0x000FFFFF
 #define        _RPT_CNT_SHT                    0
 
-
 #endif /*__RTL8712_WMAC_BITDEF_H__*/
 
index 95e9ea5..c7b43a8 100644 (file)
@@ -316,7 +316,6 @@ enum _RT_CHANNEL_DOMAIN {
        RT_CHANNEL_DOMAIN_MAX,
 };
 
-
 struct SetChannelPlan_param {
        enum _RT_CHANNEL_DOMAIN ChannelPlan;
 };
@@ -338,7 +337,6 @@ struct getdatarate_rsp {
        u8 datarates[NumRates];
 };
 
-
 /*
  *     Caller Mode: Any
  *     AP: AP can use the info for the contents of beacon frame
index 634e674..d6332a8 100644 (file)
@@ -13,7 +13,6 @@
        #define OID_802_11_PMKID                        0x0d010123
 #endif
 
-
 /* For DDK-defined OIDs*/
 #define OID_NDIS_SEG1  0x00010100
 #define OID_NDIS_SEG2  0x00010200
index 9820449..aa4d5ce 100644 (file)
@@ -148,7 +148,6 @@ extern struct oid_obj_priv oid_rtl_seg_87_12_00[32];
 
 #endif /* _RTL871X_MP_IOCTL_C_ */
 
-
 enum MP_MODE {
        MP_START_MODE,
        MP_STOP_MODE,
index ca5072e..a08c5d2 100644 (file)
@@ -26,7 +26,6 @@
 #ifndef __RTL871X_MP_PHY_REGDEF_H
 #define __RTL871X_MP_PHY_REGDEF_H
 
-
 /*--------------------------Define Parameters-------------------------------*/
 
 /*============================================================
 #define        ANTENNA_C       0x4
 #define        ANTENNA_D       0x8
 
-
 /* accept all physical address */
 #define RCR_AAP                BIT(0)
 #define RCR_APM                BIT(1)          /* accept physical match */
 
 /*--------------------------Define Parameters-------------------------------*/
 
-
 #endif /*__INC_HAL8192SPHYREG_H */
 
index 9b7e5ff..6286c62 100644 (file)
@@ -21,7 +21,6 @@
 #define NUM_STA 32
 #define NUM_ACL 64
 
-
 /* if mode ==0, then the sta is allowed once the addr is hit.
  * if mode ==1, then the sta is rejected once the addr is non-hit.
  */
index b8acb9c..498e6de 100644 (file)
@@ -186,7 +186,6 @@ static inline unsigned char *get_hdr_bssid(unsigned char *pframe)
 #define _CAPABILITY_                   2
 #define _TIMESTAMP_                            8
 
-
 /*-----------------------------------------------------------------------------
  *                     Below is the definition for WMM
  *------------------------------------------------------------------------------