arm64: dts: ti: k3: mmc: fix dtbs_check warnings

Now the dtbs_check produces below warnings
 sdhci@4f80000: clock-names:0: 'clk_ahb' was expected
 sdhci@4f80000: clock-names:1: 'clk_xin' was expected
 $nodename:0: 'sdhci@4f80000' does not match '^mmc(@.*)?$'

Fix above warnings by updating mmc DT definitions to follow
sdhci-am654.yaml bindings:
 - rename sdhci dt nodes to 'mmc@'
 - swap clk_xin/clk_ahb clocks, the clk_ahb clock expected to be defined
first

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20210115193016.5581-1-grygorii.strashko@ti.com

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 12591a8..ceb579f 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -256,7 +256,7 @@
                #size-cells = <0>;
        };
 
-       sdhci0: sdhci@4f80000 {
+       sdhci0: mmc@4f80000 {
                compatible = "ti,am654-sdhci-5.1";
                reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;
                power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
@@ -280,7 +280,7 @@
                dma-coherent;
        };
 
-       sdhci1: sdhci@4fa0000 {
+       sdhci1: mmc@4fa0000 {
                compatible = "ti,am654-sdhci-5.1";
                reg = <0x0 0x4fa0000 0x0 0x260>, <0x0 0x4fb0000 0x0 0x134>;
                power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 4cc2e90..17477ab 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -506,8 +506,8 @@
                reg = <0x00 0x04f80000 0x00 0x260>, <0x00 0x4f88000 0x00 0x134>;
                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
-               clock-names = "clk_xin", "clk_ahb";
-               clocks = <&k3_clks 91 3>, <&k3_clks 91 0>;
+               clock-names = "clk_ahb", "clk_xin";
+               clocks = <&k3_clks 91 0>, <&k3_clks 91 3>;
                ti,otap-del-sel-legacy = <0x0>;
                ti,otap-del-sel-mmc-hs = <0x0>;
                ti,otap-del-sel-ddr52 = <0x6>;
@@ -525,8 +525,8 @@
                reg = <0x00 0x04fb0000 0x00 0x260>, <0x00 0x4fb8000 0x00 0x134>;
                interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
-               clock-names = "clk_xin", "clk_ahb";
-               clocks = <&k3_clks 92 2>, <&k3_clks 92 1>;
+               clock-names = "clk_ahb", "clk_xin";
+               clocks = <&k3_clks 92 1>, <&k3_clks 92 2>;
                ti,otap-del-sel-legacy = <0x0>;
                ti,otap-del-sel-sd-hs = <0x0>;
                ti,otap-del-sel-sdr12 = <0xf>;

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 2d526ea..8c84daf 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1032,13 +1032,13 @@
                clock-names = "gpio";
        };
 
-       main_sdhci0: sdhci@4f80000 {
+       main_sdhci0: mmc@4f80000 {
                compatible = "ti,j721e-sdhci-8bit";
                reg = <0x0 0x4f80000 0x0 0x1000>, <0x0 0x4f88000 0x0 0x400>;
                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
-               clock-names = "clk_xin", "clk_ahb";
-               clocks = <&k3_clks 91 1>, <&k3_clks 91 0>;
+               clock-names = "clk_ahb", "clk_xin";
+               clocks = <&k3_clks 91 0>, <&k3_clks 91 1>;
                assigned-clocks = <&k3_clks 91 1>;
                assigned-clock-parents = <&k3_clks 91 2>;
                bus-width = <8>;
@@ -1054,13 +1054,13 @@
                dma-coherent;
        };
 
-       main_sdhci1: sdhci@4fb0000 {
+       main_sdhci1: mmc@4fb0000 {
                compatible = "ti,j721e-sdhci-4bit";
                reg = <0x0 0x04fb0000 0x0 0x1000>, <0x0 0x4fb8000 0x0 0x400>;
                interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
-               clock-names = "clk_xin", "clk_ahb";
-               clocks = <&k3_clks 92 0>, <&k3_clks 92 5>;
+               clock-names = "clk_ahb", "clk_xin";
+               clocks = <&k3_clks 92 5>, <&k3_clks 92 0>;
                assigned-clocks = <&k3_clks 92 0>;
                assigned-clock-parents = <&k3_clks 92 1>;
                ti,otap-del-sel-legacy = <0x0>;
@@ -1074,13 +1074,13 @@
                dma-coherent;
        };
 
-       main_sdhci2: sdhci@4f98000 {
+       main_sdhci2: mmc@4f98000 {
                compatible = "ti,j721e-sdhci-4bit";
                reg = <0x0 0x4f98000 0x0 0x1000>, <0x0 0x4f90000 0x0 0x400>;
                interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
                power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
-               clock-names = "clk_xin", "clk_ahb";
-               clocks = <&k3_clks 93 0>, <&k3_clks 93 5>;
+               clock-names = "clk_ahb", "clk_xin";
+               clocks = <&k3_clks 93 5>, <&k3_clks 93 0>;
                assigned-clocks = <&k3_clks 93 0>;
                assigned-clock-parents = <&k3_clks 93 1>;
                ti,otap-del-sel-legacy = <0x0>;