pinctrl: armada-37xx: Add comment for pcie1_reset pin group

Group name 'pcie1' is misleading as it controls only PCIe reset pin. Like
other PCIe groups it should have been called 'pcie1_reset'. But due to
backward compatibility it is not possible to change existing group name.
So just add comment describing this PCIe reset functionality.

Signed-off-by: Pali Rohár <pali@kernel.org>
Link: https://lore.kernel.org/r/20200724132457.7094-1-pali@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 2bbc69b..d5b6c0a 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -316,7 +316,7 @@
                                };
 
                                pcie_reset_pins: pcie-reset-pins {
-                                       groups = "pcie1";
+                                       groups = "pcie1"; /* this actually controls "pcie1_reset" */
                                        function = "gpio";
                                };
 

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 953126b..68894e9 100644 (file)
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -197,7 +197,7 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
        PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),
        PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),
        PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
-       PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"),
+       PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */
        PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"),
        PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
        PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),