Merge tag 'irq-core-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git...
authorLinus Torvalds <torvalds@linux-foundation.org>
Tue, 9 Jan 2024 03:35:04 +0000 (19:35 -0800)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 9 Jan 2024 03:35:04 +0000 (19:35 -0800)
Pull irq subsystem updates from Ingo Molnar:

 - Add support for the IA55 interrupt controller on RZ/G3S SoC's

 - Update/fix the Qualcom MPM Interrupt Controller driver's register
   enumeration within the somewhat exotic "RPM Message RAM" MMIO-mapped
   shared memory region that is used for other purposes as well

 - Clean up the Xtensa built-in Programmable Interrupt Controller driver
   (xtensa-pic) a bit

* tag 'irq-core-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/irq-xtensa-pic: Clean up
  irqchip/qcom-mpm: Support passing a slice of SRAM as reg space
  dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle
  dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3S
  irqchip/renesas-rzg2l: Add support for suspend to RAM
  irqchip/renesas-rzg2l: Add macro to retrieve TITSR register offset based on register's index
  irqchip/renesas-rzg2l: Implement restriction when writing ISCR register
  irqchip/renesas-rzg2l: Document structure members
  irqchip/renesas-rzg2l: Align struct member names to tabs
  irqchip/renesas-rzg2l: Use tabs instead of spaces

1  2 
Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml

@@@ -62,12 -68,8 +68,11 @@@ properties
          - description: MPM pin number
          - description: GIC SPI number for the MPM pin
  
 +  '#power-domain-cells':
 +    const: 0
 +
  required:
    - compatible
-   - reg
    - interrupts
    - mboxes
    - interrupt-controller
@@@ -80,21 -83,32 +86,33 @@@ additionalProperties: fals
  examples:
    - |
      #include <dt-bindings/interrupt-controller/arm-gic.h>
-     mpm: interrupt-controller@45f01b8 {
-         compatible = "qcom,mpm";
-         interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
-         reg = <0x45f01b8 0x1000>;
-         mboxes = <&apcs_glb 1>;
-         interrupt-controller;
-         #interrupt-cells = <2>;
-         interrupt-parent = <&intc>;
-         qcom,mpm-pin-count = <96>;
-         qcom,mpm-pin-map = <2 275>,
-                            <5 296>,
-                            <12 422>,
-                            <24 79>,
-                            <86 183>,
-                            <90 260>,
-                            <91 260>;
-         #power-domain-cells = <0>;
+     remoteproc-rpm {
+         compatible = "qcom,msm8998-rpm-proc", "qcom,rpm-proc";
+         glink-edge {
+             compatible = "qcom,glink-rpm";
+             interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+             qcom,rpm-msg-ram = <&rpm_msg_ram>;
+             mboxes = <&apcs_glb 0>;
+         };
+         mpm: interrupt-controller {
+             compatible = "qcom,mpm";
+             qcom,rpm-msg-ram = <&apss_mpm>;
+             interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
+             mboxes = <&apcs_glb 1>;
+             interrupt-controller;
+             #interrupt-cells = <2>;
+             interrupt-parent = <&intc>;
+             qcom,mpm-pin-count = <96>;
+             qcom,mpm-pin-map = <2 275>,
+                                <5 296>,
+                                <12 422>,
+                                <24 79>,
+                                <86 183>,
+                                <91 260>;
++            #power-domain-cells = <0>;
+         };
      };