drm/i915/display: use max_level to control loop
authorLucas De Marchi <lucas.demarchi@intel.com>
Tue, 22 Jun 2021 21:22:10 +0000 (14:22 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Fri, 25 Jun 2021 16:04:48 +0000 (09:04 -0700)
Since we are already loop through the levels to sanitize them, mark what
is the real max_level so it can be used in subsequent loop. This makes
it simpler to later add the adjustment latency to "valid levels". No
change in behavior, just makes the code easier to follow.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210622212210.3746133-2-lucas.demarchi@intel.com
drivers/gpu/drm/i915/intel_pm.c

index bd04e19..74a8863 100644 (file)
@@ -2908,6 +2908,9 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv,
                        if (wm[level] == 0) {
                                for (i = level + 1; i <= max_level; i++)
                                        wm[i] = 0;
+
+                               max_level = level - 1;
+
                                break;
                        }
                }
@@ -2922,12 +2925,8 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv,
                if (wm[0] == 0) {
                        u8 adjust = DISPLAY_VER(dev_priv) >= 12 ? 3 : 2;
 
-                       wm[0] += adjust;
-                       for (level = 1; level <= max_level; level++) {
-                               if (wm[level] == 0)
-                                       break;
+                       for (level = 0; level <= max_level; level++)
                                wm[level] += adjust;
-                       }
                }
 
                /*