arm64: dts: qcom: x1e80100: fix PCIe5 PHY clocks

Add the missing clkref enable and pipediv2 clocks to the PCIe5 PHY.

Fixes: 62ab23e15508 ("arm64: dts: qcom: x1e80100: add PCIe5 nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240916082307.29393-4-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 6a91c46..88a2e2f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -3126,14 +3126,16 @@
 
                        clocks = <&gcc GCC_PCIE_5_AUX_CLK>,
                                 <&gcc GCC_PCIE_5_CFG_AHB_CLK>,
-                                <&rpmhcc RPMH_CXO_CLK>,
+                                <&tcsr TCSR_PCIE_2L_5_CLKREF_EN>,
                                 <&gcc GCC_PCIE_5_PHY_RCHNG_CLK>,
-                                <&gcc GCC_PCIE_5_PIPE_CLK>;
+                                <&gcc GCC_PCIE_5_PIPE_CLK>,
+                                <&gcc GCC_PCIE_5_PIPEDIV2_CLK>;
                        clock-names = "aux",
                                      "cfg_ahb",
                                      "ref",
                                      "rchng",
-                                     "pipe";
+                                     "pipe",
+                                     "pipediv2";
 
                        resets = <&gcc GCC_PCIE_5_PHY_BCR>;
                        reset-names = "phy";