arm64: dts: ti: k3-j721e-main: Add output tap delay values

Add output tap delay values as given in the latest Data Manual[1],
SPRSP36E, revised December 2019.

[1] https://www.ti.com/lit/gpn/tda4vm

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20201129175223.21751-2-nsekhar@ti.com

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 4e189b3..556bc31 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1080,7 +1080,11 @@
                bus-width = <8>;
                mmc-hs400-1_8v;
                mmc-ddr-1_8v;
-               ti,otap-del-sel = <0x2>;
+               ti,otap-del-sel-legacy = <0xf>;
+               ti,otap-del-sel-mmc-hs = <0xf>;
+               ti,otap-del-sel-ddr52 = <0x5>;
+               ti,otap-del-sel-hs200 = <0x6>;
+               ti,otap-del-sel-hs400 = <0x0>;
                ti,trm-icp = <0x8>;
                ti,strobe-sel = <0x77>;
                dma-coherent;
@@ -1095,7 +1099,12 @@
                clocks = <&k3_clks 92 0>, <&k3_clks 92 5>;
                assigned-clocks = <&k3_clks 92 0>;
                assigned-clock-parents = <&k3_clks 92 1>;
-               ti,otap-del-sel = <0x2>;
+               ti,otap-del-sel-legacy = <0x0>;
+               ti,otap-del-sel-sd-hs = <0xf>;
+               ti,otap-del-sel-sdr12 = <0xf>;
+               ti,otap-del-sel-sdr25 = <0xf>;
+               ti,otap-del-sel-sdr50 = <0xc>;
+               ti,otap-del-sel-ddr50 = <0xc>;
                ti,trm-icp = <0x8>;
                ti,clkbuf-sel = <0x7>;
                dma-coherent;
@@ -1111,7 +1120,12 @@
                clocks = <&k3_clks 93 0>, <&k3_clks 93 5>;
                assigned-clocks = <&k3_clks 93 0>;
                assigned-clock-parents = <&k3_clks 93 1>;
-               ti,otap-del-sel = <0x2>;
+               ti,otap-del-sel-legacy = <0x0>;
+               ti,otap-del-sel-sd-hs = <0xf>;
+               ti,otap-del-sel-sdr12 = <0xf>;
+               ti,otap-del-sel-sdr25 = <0xf>;
+               ti,otap-del-sel-sdr50 = <0xc>;
+               ti,otap-del-sel-ddr50 = <0xc>;
                ti,trm-icp = <0x8>;
                ti,clkbuf-sel = <0x7>;
                dma-coherent;