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phy: airoha: Fix REG_CSR_2L_PLL_CMN_RESERVE0 config in airoha_pcie_phy_init_clk_out()
author
Lorenzo Bianconi
<lorenzo@kernel.org>
Wed, 18 Sep 2024 13:32:52 +0000
(15:32 +0200)
committer
Vinod Koul
<vkoul@kernel.org>
Thu, 17 Oct 2024 15:22:48 +0000
(20:52 +0530)
Fix typo configuring REG_CSR_2L_PLL_CMN_RESERVE0 register in
airoha_pcie_phy_init_clk_out routine.
Fixes:
d7d2818b9383
("phy: airoha: Add PCIe PHY driver for EN7581 SoC.")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link:
https://lore.kernel.org/r/20240918-airoha-en7581-phy-fixes-v1-1-8291729a87f8@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/phy-airoha-pcie.c
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diff --git
a/drivers/phy/phy-airoha-pcie.c
b/drivers/phy/phy-airoha-pcie.c
index
1e410eb
..
4624aa9
100644
(file)
--- a/
drivers/phy/phy-airoha-pcie.c
+++ b/
drivers/phy/phy-airoha-pcie.c
@@
-459,7
+459,7
@@
static void airoha_pcie_phy_init_clk_out(struct airoha_pcie_phy *pcie_phy)
airoha_phy_csr_2l_clear_bits(pcie_phy, REG_CSR_2L_CLKTX1_OFFSET,
CSR_2L_PXP_CLKTX1_SR);
airoha_phy_csr_2l_update_field(pcie_phy, REG_CSR_2L_PLL_CMN_RESERVE0,
- CSR_2L_PXP_PLL_RESERVE_MASK, 0xdd);
+ CSR_2L_PXP_PLL_RESERVE_MASK, 0xd
0
d);
}
static void airoha_pcie_phy_init_csr_2l(struct airoha_pcie_phy *pcie_phy)