arm64: dts: qcom: sm8250: Add QMP AOSS node
authorBjorn Andersson <bjorn.andersson@linaro.org>
Mon, 22 Jun 2020 22:27:44 +0000 (15:27 -0700)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 23 Jun 2020 19:57:49 +0000 (12:57 -0700)
Add a node for the QMP AOSS.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200622222747.717306-4-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sm8250.dtsi

index 79c9e2a..5462ed8 100644 (file)
@@ -7,6 +7,7 @@
 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
+#include <dt-bindings/power/qcom-aoss-qmp.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 
                        interrupt-controller;
                };
 
+               aoss_qmp: qmp@c300000 {
+                       compatible = "qcom,sm8250-aoss-qmp";
+                       reg = <0 0x0c300000 0 0x100000>;
+                       interrupts-extended = <&ipcc IPCC_CLIENT_AOP
+                                                    IPCC_MPROC_SIGNAL_GLINK_QMP
+                                                    IRQ_TYPE_EDGE_RISING>;
+                       mboxes = <&ipcc IPCC_CLIENT_AOP
+                                       IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+                       #clock-cells = <0>;
+                       #power-domain-cells = <1>;
+               };
+
                spmi_bus: spmi@c440000 {
                        compatible = "qcom,spmi-pmic-arb";
                        reg = <0x0 0x0c440000 0x0 0x0001100>,