rtc: zynqmp: Add calibration set and get support

Zynqmp RTC controller has a calibration feature to compensate
time deviation due to input clock inaccuracy.
Set and get calibration API's are used for setting and getting
calibration value from the controller calibration register.

Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20220626070817.3780977-3-srinivas.neeli@xilinx.com

diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index 5da33d7..1dd389b 100644 (file)
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -6,6 +6,7 @@
  *
  */
 
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -40,13 +41,19 @@
 #define RTC_CALIB_MASK         0x1FFFFF
 #define RTC_ALRM_MASK          BIT(1)
 #define RTC_MSEC               1000
+#define RTC_FR_MASK            0xF0000
+#define RTC_FR_MAX_TICKS       16
+#define RTC_PPB                        1000000000LL
+#define RTC_MIN_OFFSET         -32768000
+#define RTC_MAX_OFFSET         32767000
 
 struct xlnx_rtc_dev {
        struct rtc_device       *rtc;
        void __iomem            *reg_base;
        int                     alarm_irq;
        int                     sec_irq;
-       unsigned int            calibval;
+       struct clk              *rtc_clk;
+       unsigned int            freq;
 };
 
 static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm)
@@ -61,13 +68,6 @@ static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm)
         */
        new_time = rtc_tm_to_time64(tm) + 1;
 
-       /*
-        * Writing into calibration register will clear the Tick Counter and
-        * force the next second to be signaled exactly in 1 second period
-        */
-       xrtcdev->calibval &= RTC_CALIB_MASK;
-       writel(xrtcdev->calibval, (xrtcdev->reg_base + RTC_CALIB_WR));
-
        writel(new_time, xrtcdev->reg_base + RTC_SET_TM_WR);
 
        /*
@@ -173,15 +173,76 @@ static void xlnx_init_rtc(struct xlnx_rtc_dev *xrtcdev)
        rtc_ctrl = readl(xrtcdev->reg_base + RTC_CTRL);
        rtc_ctrl |= RTC_BATT_EN;
        writel(rtc_ctrl, xrtcdev->reg_base + RTC_CTRL);
+}
 
-       /*
-        * Based on crystal freq of 33.330 KHz
-        * set the seconds counter and enable, set fractions counter
-        * to default value suggested as per design spec
-        * to correct RTC delay in frequency over period of time.
+static int xlnx_rtc_read_offset(struct device *dev, long *offset)
+{
+       struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
+       unsigned long long rtc_ppb = RTC_PPB;
+       unsigned int tick_mult = do_div(rtc_ppb, xrtcdev->freq);
+       unsigned int calibval;
+       long offset_val;
+
+       calibval = readl(xrtcdev->reg_base + RTC_CALIB_RD);
+       /* Offset with seconds ticks */
+       offset_val = calibval & RTC_TICK_MASK;
+       offset_val = offset_val - RTC_CALIB_DEF;
+       offset_val = offset_val * tick_mult;
+
+       /* Offset with fractional ticks */
+       if (calibval & RTC_FR_EN)
+               offset_val += ((calibval & RTC_FR_MASK) >> RTC_FR_DATSHIFT)
+                       * (tick_mult / RTC_FR_MAX_TICKS);
+       *offset = offset_val;
+
+       return 0;
+}
+
+static int xlnx_rtc_set_offset(struct device *dev, long offset)
+{
+       struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
+       unsigned long long rtc_ppb = RTC_PPB;
+       unsigned int tick_mult = do_div(rtc_ppb, xrtcdev->freq);
+       unsigned char fract_tick;
+       unsigned int calibval;
+       short int  max_tick;
+       int fract_offset;
+
+       if (offset < RTC_MIN_OFFSET || offset > RTC_MAX_OFFSET)
+               return -ERANGE;
+
+       /* Number ticks for given offset */
+       max_tick = div_s64_rem(offset, tick_mult, &fract_offset);
+
+       /* Number fractional ticks for given offset */
+       if (fract_offset) {
+               if (fract_offset < 0) {
+                       fract_offset = fract_offset + tick_mult;
+                       max_tick--;
+               }
+               if (fract_offset > (tick_mult / RTC_FR_MAX_TICKS)) {
+                       for (fract_tick = 1; fract_tick < 16; fract_tick++) {
+                               if (fract_offset <=
+                                   (fract_tick *
+                                    (tick_mult / RTC_FR_MAX_TICKS)))
+                                       break;
+                       }
+               }
+       }
+
+       /* Zynqmp RTC uses second and fractional tick
+        * counters for compensation
         */
-       xrtcdev->calibval &= RTC_CALIB_MASK;
-       writel(xrtcdev->calibval, (xrtcdev->reg_base + RTC_CALIB_WR));
+       calibval = max_tick + RTC_CALIB_DEF;
+
+       if (fract_tick)
+               calibval |= RTC_FR_EN;
+
+       calibval |= (fract_tick << RTC_FR_DATSHIFT);
+
+       writel(calibval, (xrtcdev->reg_base + RTC_CALIB_WR));
+
+       return 0;
 }
 
 static const struct rtc_class_ops xlnx_rtc_ops = {
@@ -190,6 +251,8 @@ static const struct rtc_class_ops xlnx_rtc_ops = {
        .read_alarm       = xlnx_rtc_read_alarm,
        .set_alarm        = xlnx_rtc_set_alarm,
        .alarm_irq_enable = xlnx_rtc_alarm_irq_enable,
+       .read_offset      = xlnx_rtc_read_offset,
+       .set_offset       = xlnx_rtc_set_offset,
 };
 
 static irqreturn_t xlnx_rtc_interrupt(int irq, void *id)
@@ -255,10 +318,22 @@ static int xlnx_rtc_probe(struct platform_device *pdev)
                return ret;
        }
 
-       ret = of_property_read_u32(pdev->dev.of_node, "calibration",
-                                  &xrtcdev->calibval);
-       if (ret)
-               xrtcdev->calibval = RTC_CALIB_DEF;
+       /* Getting the rtc_clk info */
+       xrtcdev->rtc_clk = devm_clk_get_optional(&pdev->dev, "rtc_clk");
+       if (IS_ERR(xrtcdev->rtc_clk)) {
+               if (PTR_ERR(xrtcdev->rtc_clk) != -EPROBE_DEFER)
+                       dev_warn(&pdev->dev, "Device clock not found.\n");
+       }
+       xrtcdev->freq = clk_get_rate(xrtcdev->rtc_clk);
+       if (!xrtcdev->freq) {
+               ret = of_property_read_u32(pdev->dev.of_node, "calibration",
+                                          &xrtcdev->freq);
+               if (ret)
+                       xrtcdev->freq = RTC_CALIB_DEF;
+       }
+       ret = readl(xrtcdev->reg_base + RTC_CALIB_RD);
+       if (!ret)
+               writel(xrtcdev->freq, (xrtcdev->reg_base + RTC_CALIB_WR));
 
        xlnx_init_rtc(xrtcdev);