habanalabs: update firmware files
authorOded Gabbay <ogabbay@kernel.org>
Fri, 20 Nov 2020 19:39:09 +0000 (21:39 +0200)
committerOded Gabbay <ogabbay@kernel.org>
Mon, 30 Nov 2020 08:47:36 +0000 (10:47 +0200)
Update various firmware header files with new defines.

Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
drivers/misc/habanalabs/include/common/hl_boot_if.h
drivers/misc/habanalabs/include/gaudi/gaudi_fw_if.h
drivers/misc/habanalabs/include/goya/goya_fw_if.h

index 68ac15c..e5801ec 100644 (file)
  * CPU_BOOT_ERR0_EFUSE_FAIL            Reading from eFuse failed.
  *                                     The PCI device ID might be wrong.
  *
+ * CPU_BOOT_ERR0_PRI_IMG_VER_FAIL      Verification of primary image failed.
+ *                                     It mean that ppboot checksum
+ *                                     verification for the preboot primary
+ *                                     image has failed to match expected
+ *                                     checksum. Trying to program image again
+ *                                     might solve this.
+ *
+ * CPU_BOOT_ERR0_SEC_IMG_VER_FAIL      Verification of secondary image failed.
+ *                                     It mean that ppboot checksum
+ *                                     verification for the preboot secondary
+ *                                     image has failed to match expected
+ *                                     checksum. Trying to program image again
+ *                                     might solve this.
+ *
  * CPU_BOOT_ERR0_ENABLED               Error registers enabled.
  *                                     This is a main indication that the
  *                                     running FW populates the error
@@ -72,6 +86,8 @@
 #define CPU_BOOT_ERR0_SECURITY_NOT_RDY         (1 << 7)
 #define CPU_BOOT_ERR0_SECURITY_FAIL            (1 << 8)
 #define CPU_BOOT_ERR0_EFUSE_FAIL               (1 << 9)
+#define CPU_BOOT_ERR0_PRI_IMG_VER_FAIL         (1 << 10)
+#define CPU_BOOT_ERR0_SEC_IMG_VER_FAIL         (1 << 11)
 #define CPU_BOOT_ERR0_ENABLED                  (1 << 31)
 
 /*
  *                                     bits are not garbage, but actual
  *                                     statuses.
  *                                     Initialized in: preboot
+ *
  */
 #define CPU_BOOT_DEV_STS0_SECURITY_EN                  (1 << 0)
 #define CPU_BOOT_DEV_STS0_DEBUG_EN                     (1 << 1)
index d61a4c8..25acd9e 100644 (file)
@@ -30,7 +30,8 @@ enum gaudi_pll_index {
        MESH_PLL,
        MME_PLL,
        TPC_PLL,
-       IF_PLL
+       IF_PLL,
+       PLL_MAX
 };
 
 enum gaudi_nic_axi_error {
index 0fa80fe..daf8d8c 100644 (file)
@@ -22,7 +22,8 @@ enum goya_pll_index {
        MME_PLL,
        PCI_PLL,
        EMMC_PLL,
-       TPC_PLL
+       TPC_PLL,
+       PLL_MAX
 };
 
 #define GOYA_PLL_FREQ_LOW              50000000 /* 50 MHz */