selftests/powerpc/pmu/: Add interface test for mmcr3_src fields

The testcase uses event code 0x1340000001c040 to verify the settings for
different src fields in Monitor Mode Control Register 3 (MMCR3). Checks
if these fields are translated correctly via perf interface to MMCR3 on
ISA v3.1 platform.

Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
[mpe: Add error checking, drop GET_MMCR_FIELD, add to .gitignore]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220127072012.662451-20-kjain@linux.ibm.com

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore b/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
index 58d7551..2969a9e 100644 (file)
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/.gitignore
@@ -7,3 +7,4 @@ mmcr0_fc56_pmc56_test
 mmcr1_comb_test
 mmcr2_l2l3_test
 mmcr2_fcs_fch_test
+mmcr3_src_test

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
index b427150..cd2704b 100644 (file)
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
@@ -3,7 +3,8 @@ CFLAGS += -m64
 
 TEST_GEN_PROGS := mmcr0_exceptionbits_test mmcr0_cc56run_test mmcr0_pmccext_test \
                   mmcr0_pmcjce_test mmcr0_fc56_pmc1ce_test mmcr0_fc56_pmc56_test \
-                  mmcr1_comb_test mmcr2_l2l3_test mmcr2_fcs_fch_test
+                  mmcr1_comb_test mmcr2_l2l3_test mmcr2_fcs_fch_test \
+                  mmcr3_src_test
 
 top_srcdir = ../../../../../..
 include ../../../lib.mk

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr3_src_test.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr3_src_test.c
new file mode 100644 (file)
index 0000000..e154e2a
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcr3_src_test.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "../event.h"
+#include "misc.h"
+#include "utils.h"
+
+extern void thirty_two_instruction_loop_with_ll_sc(u64 loops, u64 *ll_sc_target);
+
+/* The data cache was reloaded from local core's L3 due to a demand load */
+#define EventCode 0x1340000001c040
+
+/*
+ * A perf sampling test for mmcr3
+ * fields.
+ */
+static int mmcr3_src(void)
+{
+       struct event event;
+       u64 *intr_regs;
+       u64 dummy;
+
+       /* Check for platform support for the test */
+       SKIP_IF(check_pvr_for_sampling_tests());
+       SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));
+
+       /* Init the event for the sampling test */
+       event_init_sampling(&event, EventCode);
+       event.attr.sample_regs_intr = platform_extended_mask;
+       FAIL_IF(event_open(&event));
+       event.mmap_buffer = event_sample_buf_mmap(event.fd, 1);
+
+       FAIL_IF(event_enable(&event));
+
+       /* workload to make event overflow */
+       thirty_two_instruction_loop_with_ll_sc(1000000, &dummy);
+
+       FAIL_IF(event_disable(&event));
+
+       /* Check for sample count */
+       FAIL_IF(!collect_samples(event.mmap_buffer));
+
+       intr_regs = get_intr_regs(&event, event.mmap_buffer);
+
+       /* Check for intr_regs */
+       FAIL_IF(!intr_regs);
+
+       /*
+        * Verify that src field of MMCR3 match with
+        * corresponding event code field
+        */
+       FAIL_IF(EV_CODE_EXTRACT(event.attr.config, mmcr3_src) !=
+               get_mmcr3_src(get_reg_value(intr_regs, "MMCR3"), 1));
+
+       event_close(&event);
+       return 0;
+}
+
+int main(void)
+{
+       return test_harness(mmcr3_src, "mmcr3_src");
+}