iio: dac: adi-axi-dac: add cntrl chan check

Add validity check on CNTRL_X channels (valid as 0 to 15).

Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Link: https://patch.msgid.link/20250409-wip-bl-ad3552r-fixes-v5-1-fb429c3a6515@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

diff --git a/drivers/iio/dac/adi-axi-dac.c b/drivers/iio/dac/adi-axi-dac.c
index 892d770..f86acb9 100644 (file)
--- a/drivers/iio/dac/adi-axi-dac.c
+++ b/drivers/iio/dac/adi-axi-dac.c
@@ -84,6 +84,7 @@
 #define AXI_DAC_CHAN_CNTRL_7_REG(c)            (0x0418 + (c) * 0x40)
 #define   AXI_DAC_CHAN_CNTRL_7_DATA_SEL                GENMASK(3, 0)
 
+#define AXI_DAC_CHAN_CNTRL_MAX                 15
 #define AXI_DAC_RD_ADDR(x)                     (BIT(7) | (x))
 
 /* 360 degrees in rad */
@@ -186,6 +187,9 @@ static int __axi_dac_frequency_get(struct axi_dac_state *st, unsigned int chan,
        u32 reg, raw;
        int ret;
 
+       if (chan > AXI_DAC_CHAN_CNTRL_MAX)
+               return -EINVAL;
+
        if (!st->dac_clk) {
                dev_err(st->dev, "Sampling rate is 0...\n");
                return -EINVAL;
@@ -230,6 +234,9 @@ static int axi_dac_scale_get(struct axi_dac_state *st,
        int ret, vals[2];
        u32 reg, raw;
 
+       if (chan->channel > AXI_DAC_CHAN_CNTRL_MAX)
+               return -EINVAL;
+
        if (tone_2)
                reg = AXI_DAC_CHAN_CNTRL_3_REG(chan->channel);
        else
@@ -264,6 +271,9 @@ static int axi_dac_phase_get(struct axi_dac_state *st,
        u32 reg, raw, phase;
        int ret, vals[2];
 
+       if (chan->channel > AXI_DAC_CHAN_CNTRL_MAX)
+               return -EINVAL;
+
        if (tone_2)
                reg = AXI_DAC_CHAN_CNTRL_4_REG(chan->channel);
        else
@@ -291,6 +301,9 @@ static int __axi_dac_frequency_set(struct axi_dac_state *st, unsigned int chan,
        u16 raw;
        int ret;
 
+       if (chan > AXI_DAC_CHAN_CNTRL_MAX)
+               return -EINVAL;
+
        if (!sample_rate || freq > sample_rate / 2) {
                dev_err(st->dev, "Invalid frequency(%u) dac_clk(%llu)\n",
                        freq, sample_rate);
@@ -342,6 +355,9 @@ static int axi_dac_scale_set(struct axi_dac_state *st,
        u32 raw = 0, reg;
        int ret;
 
+       if (chan->channel > AXI_DAC_CHAN_CNTRL_MAX)
+               return -EINVAL;
+
        ret = iio_str_to_fixpoint(buf, 100000, &integer, &frac);
        if (ret)
                return ret;
@@ -385,6 +401,9 @@ static int axi_dac_phase_set(struct axi_dac_state *st,
        u32 raw, reg;
        int ret;
 
+       if (chan->channel > AXI_DAC_CHAN_CNTRL_MAX)
+               return -EINVAL;
+
        ret = iio_str_to_fixpoint(buf, 100000, &integer, &frac);
        if (ret)
                return ret;
@@ -493,6 +512,9 @@ static int axi_dac_data_source_set(struct iio_backend *back, unsigned int chan,
 {
        struct axi_dac_state *st = iio_backend_get_priv(back);
 
+       if (chan > AXI_DAC_CHAN_CNTRL_MAX)
+               return -EINVAL;
+
        switch (data) {
        case IIO_BACKEND_INTERNAL_CONTINUOUS_WAVE:
                return regmap_update_bits(st->regmap,
@@ -521,6 +543,8 @@ static int axi_dac_set_sample_rate(struct iio_backend *back, unsigned int chan,
        unsigned int freq;
        int ret, tone;
 
+       if (chan > AXI_DAC_CHAN_CNTRL_MAX)
+               return -EINVAL;
        if (!sample_rate)
                return -EINVAL;
        if (st->reg_config & AXI_DAC_CONFIG_DDS_DISABLE)