ARM: dts: rockchip: add cpu-core resets for rk3188

Specify the reset handles for each cpu core.

Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>

diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 9d8c4c5..f1f7a36 100644 (file)
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -26,6 +26,7 @@
                        clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                        operating-points-v2 = <&cpu0_opp_table>;
+                       resets = <&cru SRST_CORE0>;
                };
                cpu@1 {
                        device_type = "cpu";
@@ -33,6 +34,7 @@
                        next-level-cache = <&L2>;
                        reg = <0x1>;
                        operating-points-v2 = <&cpu0_opp_table>;
+                       resets = <&cru SRST_CORE1>;
                };
                cpu@2 {
                        device_type = "cpu";
@@ -40,6 +42,7 @@
                        next-level-cache = <&L2>;
                        reg = <0x2>;
                        operating-points-v2 = <&cpu0_opp_table>;
+                       resets = <&cru SRST_CORE2>;
                };
                cpu@3 {
                        device_type = "cpu";
@@ -47,6 +50,7 @@
                        next-level-cache = <&L2>;
                        reg = <0x3>;
                        operating-points-v2 = <&cpu0_opp_table>;
+                       resets = <&cru SRST_CORE3>;
                };
        };