drm/i915: Implement WaDisableVFclkgate.
authorRafael Antognolli <rafael.antognolli@intel.com>
Sat, 16 Dec 2017 00:11:16 +0000 (16:11 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Dec 2017 21:43:21 +0000 (13:43 -0800)
This workaround supposedly fixes some hangs in the VF unit.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171216001117.14232-1-rafael.antognolli@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c

index 14ade8f..759c600 100644 (file)
@@ -3875,6 +3875,9 @@ enum {
 #define  SARBUNIT_CLKGATE_DIS          (1 << 5)
 #define  RCCUNIT_CLKGATE_DIS           (1 << 7)
 
+#define UNSLICE_UNIT_LEVEL_CLKGATE     _MMIO(0x9434)
+#define  VFUNIT_CLKGATE_DIS            (1 << 20)
+
 /*
  * Display engine regs
  */
index 18779c6..1db79a8 100644 (file)
@@ -8447,6 +8447,11 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
        if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0))
                val |= SARBUNIT_CLKGATE_DIS;
        I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val);
+
+       /* WaDisableVFclkgate:cnl */
+       val = I915_READ(UNSLICE_UNIT_LEVEL_CLKGATE);
+       val |= VFUNIT_CLKGATE_DIS;
+       I915_WRITE(UNSLICE_UNIT_LEVEL_CLKGATE, val);
 }
 
 static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)