arm64: dts: renesas: r8a77990: sort pciec0 node within soc node

Move the pciec0 node so that sub-nodes of the soc node are
sorted by bus address.

This change has no run-time affect.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index b2f606e..bdc7f7d 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -1526,6 +1526,33 @@
                        resets = <&cpg 408>;
                };
 
+               pciec0: pcie@fe000000 {
+                       compatible = "renesas,pcie-r8a77990",
+                                    "renesas,pcie-rcar-gen3";
+                       reg = <0 0xfe000000 0 0x80000>;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       bus-range = <0x00 0xff>;
+                       device_type = "pci";
+                       ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
+                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
+                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
+                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+                       /* Map all possible DDR as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+                       interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 0>;
+                       interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+                       clock-names = "pcie", "pcie_bus";
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+                       resets = <&cpg 319>;
+                       status = "disabled";
+               };
+
                vspb0: vsp@fe960000 {
                        compatible = "renesas,vsp2";
                        reg = <0 0xfe960000 0 0x8000>;
@@ -1724,33 +1751,6 @@
                        };
                };
 
-               pciec0: pcie@fe000000 {
-                       compatible = "renesas,pcie-r8a77990",
-                                    "renesas,pcie-rcar-gen3";
-                       reg = <0 0xfe000000 0 0x80000>;
-                       #address-cells = <3>;
-                       #size-cells = <2>;
-                       bus-range = <0x00 0xff>;
-                       device_type = "pci";
-                       ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
-                               0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
-                               0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
-                               0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
-                       interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
-                               <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
-                       #interrupt-cells = <1>;
-                       interrupt-map-mask = <0 0 0 0>;
-                       interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
-                       clock-names = "pcie", "pcie_bus";
-                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
-                       resets = <&cpg 319>;
-                       status = "disabled";
-               };
-
                prr: chipid@fff00044 {
                        compatible = "renesas,prr";
                        reg = <0 0xfff00044 0 4>;