Footbridge is the last Arm platform that has its own
__virt_to_bus()/__bus_to_virt()/phys_to_dma()/dma_to_phys() abstraction,
but this is just a simple offset now.
For PCI devices, the offset that is programmed into the PCI bridge must
also be set in each device using dma_direct_set_offset(). As Arm does
not have a pcibios_bus_add_device() helper yet, just use a bus notifier
for this.
For the ISA DMA, drivers now pass a non-translated physical address into
set_dma_addr(), so they have to be converted back with the corresponding
isa_bus_to_virt() function and then into the correct bus address with
the offset using the isa_dma_dev.
Tested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+++ /dev/null
-#include <mach/dma-direct.h>
*/
extern void __set_dma_addr(unsigned int chan, void *addr);
#define set_dma_addr(chan, addr) \
*/
extern void __set_dma_addr(unsigned int chan, void *addr);
#define set_dma_addr(chan, addr) \
- __set_dma_addr(chan, (void *)__bus_to_virt(addr))
+ __set_dma_addr(chan, (void *)isa_bus_to_virt(addr))
/* Set the DMA byte count for this channel
*
/* Set the DMA byte count for this channel
*
#define DC21285_IO(x) (x)
#endif
#define DC21285_IO(x) (x)
#endif
+/*
+ * The footbridge is programmed to expose the system RAM at 0xe0000000.
+ * The requirement is that the RAM isn't placed at bus address 0, which
+ * would clash with VGA cards.
+ */
+#define BUS_OFFSET 0xe0000000
+
#define CSR_PCICMD DC21285_IO(0x0004)
#define CSR_CLASSREV DC21285_IO(0x0008)
#define CSR_PCICACHELINESIZE DC21285_IO(0x000c)
#define CSR_PCICMD DC21285_IO(0x0004)
#define CSR_CLASSREV DC21285_IO(0x0008)
#define CSR_PCICACHELINESIZE DC21285_IO(0x000c)
#define virt_to_idmap(x) __virt_to_idmap((unsigned long)(x))
#define virt_to_idmap(x) __virt_to_idmap((unsigned long)(x))
-/*
- * Virtual <-> DMA view memory address translations
- * Again, these are *only* valid on the kernel direct mapped RAM
- * memory. Use of these is *deprecated* (and that doesn't mean
- * use the __ prefixed forms instead.) See dma-mapping.h.
- */
-#ifndef __virt_to_bus
-#define __virt_to_bus __virt_to_phys
-#define __bus_to_virt __phys_to_virt
-#endif
-
/*
* Conversion between a struct page and a physical address.
*
/*
* Conversion between a struct page and a physical address.
*
# Footbridge support
config FOOTBRIDGE
def_bool y
# Footbridge support
config FOOTBRIDGE
def_bool y
- select ARCH_HAS_PHYS_TO_DMA
select ARCH_MIGHT_HAVE_PC_SERIO
select ISA_DMA_API
select ARCH_MIGHT_HAVE_PC_SERIO
select ISA_DMA_API
*CSR_SA110_CNTL |= (1 << 13);
}
}
*CSR_SA110_CNTL |= (1 << 13);
}
}
-
-dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
-{
- return paddr + (BUS_OFFSET - PHYS_OFFSET);
-}
-
-phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
-{
- return dev_addr - (BUS_OFFSET - PHYS_OFFSET);
-}
* Copyright (C) 1998-2001 Russell King
* Copyright (C) 1998-2000 Phil Blundell
*/
* Copyright (C) 1998-2001 Russell King
* Copyright (C) 1998-2000 Phil Blundell
*/
+#include <linux/dma-map-ops.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
+static int dc21285_pci_bus_notifier(struct notifier_block *nb,
+ unsigned long action,
+ void *data)
+{
+ if (action != BUS_NOTIFY_ADD_DEVICE)
+ return NOTIFY_DONE;
+
+ dma_direct_set_offset(data, PHYS_OFFSET, BUS_OFFSET, SZ_256M);
+
+ return NOTIFY_OK;
+}
+
+static struct notifier_block dc21285_pci_bus_nb = {
+ .notifier_call = dc21285_pci_bus_notifier,
+};
+
int __init dc21285_setup(int nr, struct pci_sys_data *sys)
{
struct resource *res;
int __init dc21285_setup(int nr, struct pci_sys_data *sys)
{
struct resource *res;
pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
+ bus_register_notifier(&pci_bus_type, &dc21285_pci_bus_nb);
+
*/
*CSR_PCICSRBASE = 0xf4000000;
*CSR_PCICSRIOBASE = 0;
*/
*CSR_PCICSRBASE = 0xf4000000;
*CSR_PCICSRIOBASE = 0;
- *CSR_PCISDRAMBASE = __virt_to_bus(PAGE_OFFSET);
+ *CSR_PCISDRAMBASE = BUS_OFFSET;
*CSR_PCIROMBASE = 0;
*CSR_PCICMD = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
PCI_COMMAND_INVALIDATE | PCICMD_ERROR_BITS;
*CSR_PCIROMBASE = 0;
*CSR_PCICMD = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
PCI_COMMAND_INVALIDATE | PCICMD_ERROR_BITS;
* arch/arm/kernel/dma-ebsa285.c
* Copyright (C) 1998 Phil Blundell
*/
* arch/arm/kernel/dma-ebsa285.c
* Copyright (C) 1998 Phil Blundell
*/
+#include <linux/dma-map-ops.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <asm/dma.h>
#include <asm/mach/dma.h>
#include <asm/dma.h>
#include <asm/mach/dma.h>
+#include <asm/hardware/dec21285.h>
#define ISA_DMA_MASK 0
#define ISA_DMA_MODE 1
#define ISA_DMA_MASK 0
#define ISA_DMA_MODE 1
request_dma(DMA_ISA_CASCADE, "cascade");
}
request_dma(DMA_ISA_CASCADE, "cascade");
}
+ dma_direct_set_offset(&isa_dma_dev, PHYS_OFFSET, BUS_OFFSET, SZ_256M);
+
return 0;
}
core_initcall(isa_dma_init);
return 0;
}
core_initcall(isa_dma_init);
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef MACH_FOOTBRIDGE_DMA_DIRECT_H
-#define MACH_FOOTBRIDGE_DMA_DIRECT_H 1
-
-dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
-phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr);
-
-#endif /* MACH_FOOTBRIDGE_DMA_DIRECT_H */
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
-/*
- * The footbridge is programmed to expose the system RAM at 0xe0000000.
- * The requirement is that the RAM isn't placed at bus address 0, which
- * would clash with VGA cards.
- */
-#define BUS_OFFSET 0xe0000000
-#define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET))
-#define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET))
-
/*
* Cache flushing area.
*/
/*
* Cache flushing area.
*/