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ARM: dts: aspeed: Add silicon id node
authorJoel Stanley <joel@jms.id.au>
Mon, 21 Sep 2020 09:16:44 +0000 (18:46 +0930)
committerJoel Stanley <joel@jms.id.au>
Fri, 25 Sep 2020 00:44:12 +0000 (10:14 +0930)
commitfe100b382c1c052b63c14091fd8bb3fe932453ae
treeabac7568839e6322448b4ae8b053e003fafc0623tree | snapshot
parente0218dca5787c851b403fcbc33cdfec795446fcacommit | diff
ARM: dts: aspeed: Add silicon id node

This register describes the silicon id and chip unique id. It varies
between CPU revisions, but is always part of the SCU.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200921091644.133107-4-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/aspeed-g4.dtsi diff | blob | history
arch/arm/boot/dts/aspeed-g5.dtsi diff | blob | history
arch/arm/boot/dts/aspeed-g6.dtsi diff | blob | history
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