RISC-V: Allow marking IPIs as suitable for remote FENCEs
authorAnup Patel <apatel@ventanamicro.com>
Tue, 28 Mar 2023 03:52:20 +0000 (09:22 +0530)
committerMarc Zyngier <maz@kernel.org>
Sat, 8 Apr 2023 10:26:24 +0000 (11:26 +0100)
commitfb0f3d281b7f81a11e210783940f3798c4744179
tree146c5fa6ba26a9c8079ff4d908aa8d606d9af3d5
parent832f15f42646812b096bc67c0eac439291a0db1f
RISC-V: Allow marking IPIs as suitable for remote FENCEs

To do remote FENCEs (i.e. remote TLB flushes) using IPI calls on the
RISC-V kernel, we need hardware mechanism to directly inject IPI from
the supervisor mode (i.e. RISC-V kernel) instead of using SBI calls.

The upcoming AIA IMSIC devices allow direct IPI injection from the
supervisor mode (i.e. RISC-V kernel). To support this, we extend the
riscv_ipi_set_virq_range() function so that IPI provider (i.e. irqchip
drivers can mark IPIs as suitable for remote FENCEs.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230328035223.1480939-5-apatel@ventanamicro.com
arch/riscv/include/asm/smp.h
arch/riscv/kernel/sbi-ipi.c
arch/riscv/kernel/smp.c
drivers/clocksource/timer-clint.c