clk: imx7d: correct enet phy ref clock gates
authorAnson Huang <Anson.Huang@nxp.com>
Fri, 18 May 2018 01:01:04 +0000 (09:01 +0800)
committerStephen Boyd <sboyd@kernel.org>
Fri, 1 Jun 2018 19:14:32 +0000 (12:14 -0700)
commitf93f2ed94a9073b224ca817178562a6281d2eda5
tree4ab22e19672dac0131e260d3dfafd31292a7f609
parent60cc43fc888428bb2f18f08997432d426a243338
clk: imx7d: correct enet phy ref clock gates

IMX7D_ENET_PHY_REF_ROOT_DIV supplies clock for PHY directly,
there is no clock gate after it, rename it to
IMX7D_ENET_PHY_REF_ROOT_CLK to avoid device tree change.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/imx/clk-imx7d.c