drm/i915/adl_p: MBUS programming
authorVandita Kulkarni <vandita.kulkarni@intel.com>
Wed, 19 May 2021 00:06:17 +0000 (17:06 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Thu, 20 May 2021 06:59:23 +0000 (23:59 -0700)
commitf4dc008632260d981c2afc6d72a0a31ca4c7191c
tree02ca9ec0bef9b5b52fb484c59fc6c801c702f810
parent835c176cb1c4f4bb9dd25ff9cc914914938df70a
drm/i915/adl_p: MBUS programming

Update MBUS_CTL register if the 2 mbus can be joined as per the current
DDB allocation and active pipes, also update hashing mode and pipe
select bits as  per the sequence mentioned in the bspec.

Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210519000625.3184321-10-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_atomic.c
drivers/gpu/drm/i915/display/intel_atomic.h
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_pm.h