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arm64: KVM: add missing dsb before invalidating Stage-2 TLBs
authorMarc Zyngier <marc.zyngier@arm.com>
Tue, 11 Jun 2013 17:05:25 +0000 (18:05 +0100)
committerMarc Zyngier <marc.zyngier@arm.com>
Fri, 9 Aug 2013 12:19:28 +0000 (13:19 +0100)
commitf142e5eeb724cfbedd203b32b3b542d78dbe2545
tree59f6c4d3927ecceecb9541d194e4ec9c8a12db0btree | snapshot
parent1bbd80549810637b7381ab0649ba7c7d62f1342acommit | diff
arm64: KVM: add missing dsb before invalidating Stage-2 TLBs

When performing a Stage-2 TLB invalidation, it is necessary to
make sure the write to the page tables is observable by all CPUs.

For this purpose, add dsb instructions to __kvm_tlb_flush_vmid_ipa
and __kvm_flush_vm_context before doing the TLB invalidation itself.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm64/kvm/hyp.S diff | blob | history
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