pwm: mediatek: Lock and cache clock rate
authorUwe Kleine-König <u.kleine-koenig@baylibre.com>
Fri, 25 Jul 2025 15:45:11 +0000 (17:45 +0200)
committerUwe Kleine-König <ukleinek@kernel.org>
Mon, 15 Sep 2025 09:39:45 +0000 (11:39 +0200)
commited5902a2464834656f94f1c23fa61f99ea38f328
tree839bc5d3fbca782ab493f06d1ecf6373278a955c
parent849b064c16977202298ac411f80c83ea047fe466
pwm: mediatek: Lock and cache clock rate

This simplifies error handling and reduces the amount of clk_get_rate()
calls.

While touching the clk handling also allocate the clock array as part of
driver data and lock the clock rate to ensure that the output doesn't
change unexpectedly.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250725154506.2610172-17-u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
drivers/pwm/pwm-mediatek.c