clk: tegra: divider: Mark Memory Controller clock as read-only
authorDmitry Osipenko <digetx@gmail.com>
Sun, 14 Apr 2019 19:23:21 +0000 (22:23 +0300)
committerStephen Boyd <sboyd@kernel.org>
Thu, 25 Apr 2019 20:54:23 +0000 (13:54 -0700)
commite71f4d385878671991e200083c7d30eb4ca8e99a
treece71492050855769e843255e002e2360efcd16e7
parentf4037654a89906045a1c6a046c35e625524747ce
clk: tegra: divider: Mark Memory Controller clock as read-only

The Memory Controller (MC) clock rate can't be simply changed and nothing
in kernel need to change the rate, hence let's make the clock read-only.
This id also needed for the EMC driver because timing configuration may
require the MC clock diver to be disabled, that is handled by the EMC
clock / EMC driver integration and CLK framework shall not touch the
MC divider configuration on the EMC clock rate change.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/tegra/clk-divider.c