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(parent: 282d16b) | patch
staging: iio: frequency: ad9834: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 7 Aug 2022 15:12:16 +0000 (16:12 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Mon, 15 Aug 2022 21:30:01 +0000 (22:30 +0100)
commite48668a38bf420c660b07851985e6922fcf4b194
tree2a55cb847ed801b21bdd4b248e85f06058727b15tree
parent282d16b628e4979eee692f5f93a936e5d613c926commit | diff
staging: iio: frequency: ad9834: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220807151218.656881-3-jic23@kernel.org
drivers/staging/iio/frequency/ad9834.c diff | blob | history
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