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(parent: b3b723d) | patch
clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macro
authorHeiko Stuebner <heiko@sntech.de>
Thu, 6 Jun 2019 08:20:32 +0000 (10:20 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Sat, 15 Jun 2019 13:54:24 +0000 (15:54 +0200)
commite4488e45e240c4906119dfda24996701632bdb4d
tree9b70b7aafb6c6721bb1d759fe8580a2148ced85ftree | snapshot
parentb3b723d8c485af81663b5331459885536006d7facommit | diff
clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macro

Convert the boilerplate code for manual addition of the watchdog clock
to the new SGRF_GATE macro for all affected socs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-px30.c diff | blob | history
drivers/clk/rockchip/clk-rk3288.c diff | blob | history
drivers/clk/rockchip/clk-rk3368.c diff | blob | history
drivers/clk/rockchip/clk-rk3399.c diff | blob | history
MicroBlaze GIT Repository