KVM: SVM: relax conditions for allowing MSR_IA32_SPEC_CTRL accesses
authorPaolo Bonzini <pbonzini@redhat.com>
Wed, 5 Feb 2020 15:10:52 +0000 (16:10 +0100)
committerPaolo Bonzini <pbonzini@redhat.com>
Wed, 5 Feb 2020 15:12:57 +0000 (16:12 +0100)
commitdf7e8818926eb4712b67421442acf7d568fe2645
tree7eb436326517e289dcb475d119933faace074c97
parent4400cf546b4bb62d49198f6642add01bf6e9b34d
KVM: SVM: relax conditions for allowing MSR_IA32_SPEC_CTRL accesses

Userspace that does not know about the AMD_IBRS bit might still
allow the guest to protect itself with MSR_IA32_SPEC_CTRL using
the Intel SPEC_CTRL bit.  However, svm.c disallows this and will
cause a #GP in the guest when writing to the MSR.  Fix this by
loosening the test and allowing the Intel CPUID bit, and in fact
allow the AMD_STIBP bit as well since it allows writing to
MSR_IA32_SPEC_CTRL too.

Reported-by: Zhiyi Guo <zhguo@redhat.com>
Analyzed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Analyzed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/svm.c