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(parent: 0a2bf92) | patch
iio: adc: ti-ads8344: properly byte swap value
authorAlexandre Belloni <alexandre.belloni@bootlin.com>
Thu, 16 Apr 2020 20:54:27 +0000 (22:54 +0200)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 19 Apr 2020 16:50:02 +0000 (17:50 +0100)
commitdd7de4c0023e7564cabe39d64b2822a522890792
treed5fdf54eac7f63a6bbc973a4b504269f726d22e7tree | snapshot
parent0a2bf9200aeaa8c1dd23ec65af30af3643ace887commit | diff
iio: adc: ti-ads8344: properly byte swap value

The first received byte is the MSB, followed by the LSB so the value needs
to be byte swapped.

Also, the ADC actually has a delay of one clock on the SPI bus. Read three
bytes to get the last bit.

Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
drivers/iio/adc/ti-ads8344.c diff | blob | history
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