x86/hyperv: Allow guests to enable InvariantTSC
authorAndrea Parri <parri.andrea@gmail.com>
Thu, 3 Oct 2019 15:52:00 +0000 (17:52 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Tue, 12 Nov 2019 10:44:21 +0000 (11:44 +0100)
commitdce7cd62754b5d4a6e401b8b0769ec94cf971041
treed3ffbd44694b1f6cd044ae85e07c45d70caedca0
parentb264f57fde0c686c5c1dfdd0c21992c49196bb87
x86/hyperv: Allow guests to enable InvariantTSC

If the hardware supports TSC scaling, Hyper-V will set bit 15 of the
HV_PARTITION_PRIVILEGE_MASK in guest VMs with a compatible Hyper-V
configuration version.  Bit 15 corresponds to the
AccessTscInvariantControls privilege.  If this privilege bit is set,
guests can access the HvSyntheticInvariantTscControl MSR: guests can
set bit 0 of this synthetic MSR to enable the InvariantTSC feature.
After setting the synthetic MSR, CPUID will enumerate support for
InvariantTSC.

Signed-off-by: Andrea Parri <parri.andrea@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Michael Kelley <mikelley@microsoft.com>
Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Link: https://lkml.kernel.org/r/20191003155200.22022-1-parri.andrea@gmail.com
arch/x86/include/asm/hyperv-tlfs.h
arch/x86/kernel/cpu/mshyperv.c