perf/x86/intel/uncore: Remove hard coding of PMON box control MSR offset
authorHarish Chegondi <harish.chegondi@intel.com>
Mon, 7 Dec 2015 22:32:31 +0000 (14:32 -0800)
committerIngo Molnar <mingo@kernel.org>
Wed, 6 Jan 2016 10:15:37 +0000 (11:15 +0100)
commitdae25530a44ad9e6523495ebc8b37bb0a1640490
treead2c9925ef0e46a0daaf846d1b2c1d118ae0f696
parent1e7b93906249a7ccca730be03168ace15f95709e
perf/x86/intel/uncore: Remove hard coding of PMON box control MSR offset

Call uncore_pci_box_ctl() function to get the PMON box control MSR offset
instead of hard coding the offset. This would allow us to use this
snbep_uncore_pci_init_box() function for other PCI PMON devices whose box
control MSR offset is different from SNBEP_PCI_PMON_BOX_CTL.

Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Andi Kleen <andi.kleen@intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Harish Chegondi <harish.chegondi@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Lukasz Anaczkowski <lukasz.anaczkowski@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/872e8ef16cfc38e5ff3b45fac1094e6f1722e4ad.1449470704.git.harish.chegondi@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c