net/mlx5: Arm only EQs with EQEs
authorShay Drory <shayd@nvidia.com>
Tue, 1 Dec 2020 22:42:05 +0000 (14:42 -0800)
committerSaeed Mahameed <saeedm@nvidia.com>
Tue, 8 Dec 2020 19:28:48 +0000 (11:28 -0800)
commitd894892dda25556b026753622e447c773232d685
tree99c78d1982842312ba9f8884864f8bc3381387a4
parentfe8395168d844bef1551edcc6f6b96b2e8eff1d3
net/mlx5: Arm only EQs with EQEs

Currently, when more than one EQ is sharing an IRQ, and this IRQ is
being interrupted, all the EQs sharing the IRQ will be armed. This is
done regardless of whether an EQ has EQE.
When multiple EQs are sharing an IRQ, one or more EQs can have valid
EQEs.

Signed-off-by: Shay Drory <shayd@nvidia.com>
Reviewed-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/eq.c