spi: zynq-qspi: Support two chip selects
authorMiquel Raynal <miquel.raynal@bootlin.com>
Fri, 8 Nov 2019 14:07:44 +0000 (15:07 +0100)
committerMark Brown <broonie@kernel.org>
Fri, 8 Nov 2019 17:45:09 +0000 (17:45 +0000)
commitd575c9b7c8b4c5ddfb1aa75ac91fdcc20ce328c4
tree110b16c35651c703596da5091399b22997e6144f
parent8f16292d8b492ca6b0d58ac0769de1c1a7bbb544
spi: zynq-qspi: Support two chip selects

The Zynq QSPI controller features 2 CS. When the num-cs DT property
is set to 2, the hardware will be initialized to support having two
devices connected over each CS.

In this case, both CS lines are driven by the state of the U_PAGE
(upper page) bit. When unset, the lower page (CS0) is selected,
otherwise it is the upper page (CS1).

Change tested on a custom design featuring two SPI-NORs with different
CS on the Zynq-7000 QSPI bus.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20191108140744.1734-8-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-zynq-qspi.c