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(parent: 5efa232) | patch
dt-bindings: PCI: qcom,pcie-sm8550: Add SAR2130P compatible
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 17 Oct 2024 18:04:47 +0000 (21:04 +0300)
committerKrzysztof Wilczyński <kwilczynski@kernel.org>
Sat, 2 Nov 2024 14:32:28 +0000 (14:32 +0000)
commitd38cc57c14ff9590e03da77987217eca19ea350d
tree0c9ef1beec54c9ecbb8489d9cbb1354db02a753ctree
parent5efa23224bf573d4bceb51bc646dd67b6ccb83b5commit | diff
dt-bindings: PCI: qcom,pcie-sm8550: Add SAR2130P compatible

On the Qualcomm SAR2130P platform the PCIe host is compatible with the
DWC controller present on the SM8550 platorm, just using one additional
clock.

Link: https://lore.kernel.org/r/20241017-sar2130p-pci-v1-1-5b95e63d9624@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml diff | blob | history
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