drm/rockchip: Disallow PSR for the whole atomic commit
authorTomasz Figa <tfiga@chromium.org>
Mon, 23 Apr 2018 10:50:02 +0000 (12:50 +0200)
committerAndrzej Hajda <a.hajda@samsung.com>
Tue, 24 Apr 2018 06:34:53 +0000 (08:34 +0200)
commitd2d4f51d5ae4151c08c3d380426625a48e79b5b3
tree604ecbbbd591205841840877d44fa54cdd26b0f2
parent6e6cf3e2f2651c24c121aaba63f591166a9957dc
drm/rockchip: Disallow PSR for the whole atomic commit

Currently PSR flush is triggered from CRTC's .atomic_begin() callback,
which is executed after modeset disables and enables and before plane
updates are committed. Since PSR flush and re-enable can be triggered
asynchronously by external sources (input event, delayed work), it can
race with hardware programming done in the aforementioned stages.

This patch blocks the PSR completely before hardware programming part
begins and unblock after it ends. This relies on reference counted PSR
disable introduced with previous patch.

Cc: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180423105003.9004-27-enric.balletbo@collabora.com
drivers/gpu/drm/rockchip/rockchip_drm_fb.c
drivers/gpu/drm/rockchip/rockchip_drm_vop.c