drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 12 Apr 2016 19:14:34 +0000 (22:14 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 15 Apr 2016 13:25:27 +0000 (16:25 +0300)
commitcd2d34d9b61ff4535eb6c8e49cf26acc0c55c712
treec89630fd22393f841f9f4a74dd14b7142146cc9e
parentda6110bcbc0837eddf6292a0f8cb72f00507fde8
drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV

Set up DPLL and DPLL_MD even when driving DSI output on VLV/CHV. While
the DPLL isn't used to provide the clock we still need the refclock, and
it appears that the pixel repeat factor also has an effect on DSI
output. So set up eveyrhing in DPLL and DPLL_MD as we would do for
DP/HDMI/VGA, but don't actually enable the DPLL or configure the
dividers via DPIO.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460488478-18311-2-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Tested-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dsi.c