drm/i915: Make the CHV CGM CSC register writes lockless
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 2 Feb 2022 11:16:15 +0000 (13:16 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 18 Feb 2022 15:27:31 +0000 (17:27 +0200)
commitc94d13e9d99bc0432cbcc2371060acf5e10cd7ca
tree7631da03036710042cb392bd7a26ffaea6776c64
parent61b3b2da10dba0ac1633c699c9d305c702b43720
drm/i915: Make the CHV CGM CSC register writes lockless

The CHV CGM CSC registers are single buffered and so we
may have to write them from the vblank worker, which
imposes very tight dealines. Drop the pointless locking
for the register accessess to reduce the overhead.
All the other registers we bash from the vblank worker
(LUTs) were already made lockless earlier.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220202111616.1579-3-ville.syrjala@linux.intel.com
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
drivers/gpu/drm/i915/display/intel_color.c