pinctrl: baytrail: Add pin control data structures
authorCristina Ciocan <cristina.ciocan@intel.com>
Fri, 1 Apr 2016 11:00:02 +0000 (14:00 +0300)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 4 Apr 2016 13:55:21 +0000 (15:55 +0200)
commitc8f5c4c7c82c916faf4699927801c8038d1fac51
tree2398cd8b63ffa86e07b5ea100c884d2d78a59d5c
parentd32f7fd3bbc32732b094d938b95169521503a9fb
pinctrl: baytrail: Add pin control data structures

In order to implement pin control for Baytrail, we need data
structures in which to store and pass along pin, group, function,
community and SOC data information.

Baytrail has 3 GPIO controllers. Add SCORE, NCORE and SUS
controller data:
- pins (for all controllers),
- pad map for pins (for all controllers; we need this since pads
  are not ordered),
- groups (for SCORE and SUS controllers),
- functions (for SCORE and SUS controllers),
- communities (for all controllers),
- soc specific data gathering all of the above and the ACPI UID
  (for all controllers)

This information is useful for pin control functionality.
NCORE data is lighter than the other two controllers' due to
lack of pin documentation in the public datasheet.

Datasheet:
http://www.intel.com/content/www/us/en/embedded/products/bay-trail/atom-e3800-family-datasheet.html

Signed-off-by: Cristina Ciocan <cristina.ciocan@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/intel/pinctrl-baytrail.c