soc: qcom: llcc-qcom: Add support for SM8250 SoC
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Mon, 30 Nov 2020 09:39:24 +0000 (15:09 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Mon, 28 Dec 2020 18:15:14 +0000 (12:15 -0600)
commitc4df37fe186de4df8895a7a4793f5221eda6e5ae
tree7049e1829417257f3c863336cfe6f8aaed918b41
parent916c0c05521a52f13283ad3600793fc79516ff31
soc: qcom: llcc-qcom: Add support for SM8250 SoC

SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register
needs to be written to enable the Write Sub Cache for each SCID. Hence,
use a dedicated "write_scid_en" member with predefined values and write
them for LLCC IP version 2.

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
drivers/soc/qcom/llcc-qcom.c
include/linux/soc/qcom/llcc-qcom.h