net: dsa: microchip: lan937x: add phylink_get_caps support
authorArun Ramadoss <arun.ramadoss@microchip.com>
Fri, 1 Jul 2022 15:10:34 +0000 (20:40 +0530)
committerDavid S. Miller <davem@davemloft.net>
Sat, 2 Jul 2022 15:34:05 +0000 (16:34 +0100)
commitc14e878d4a4f6f5e1f58e83ac25363a1b80fa374
treeed03f9121992082316b82e6cc4fbf70c94fc5e29
parentab8823688f9e4adb0d423d5659df619806c8d15c
net: dsa: microchip: lan937x: add phylink_get_caps support

The internal phy of the LAN937x are capable of 100Mbps Full duplex. The
xMII port of switch is capable of 10Mbps Full & Half Duplex, 100Mbps
Full & Half Duplex and 1000Mbps Half duplex. xMII port also supports Tx
and Rx Flow control.

Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/dsa/microchip/ksz_common.c
drivers/net/dsa/microchip/lan937x.h
drivers/net/dsa/microchip/lan937x_main.c