drm/i915: add VLV DSI PLL Calculations
authorymohanma <yogesh.mohan.marimuthu@intel.com>
Tue, 27 Aug 2013 20:40:56 +0000 (23:40 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 4 Sep 2013 15:34:48 +0000 (17:34 +0200)
commitbe4fc046bed35f7a50c8d5751abf555933d864ae
treeea79cfb822277709907223c3d59c89b625379b1d
parent4e646495c6153f304fe45b6564ee08d4df935bb1
drm/i915: add VLV DSI PLL Calculations

v2:
 - Grab dpio_lock mutex in vlv_enable_dsi_pll().
 - Add and call vlv_disable_dsi_pll().

v3: Mostly based on Ville's review comments.
 - Only pipe A has DSI PLL lock bit.
 - Add more of CCK REG bit definitions for DSI PLL.
 - Make tables static.
 - Move clock gating out of the clock calculation functions.
 - DSI PLL LDO power gating.
 - Put alternative MNP from table calc behind #ifdef.

v4: s/CKK/CLK/ in the CCK REG bit definitions (Ville).

Signed-off-by: ymohanma <yogesh.mohan.marimuthu@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/Makefile
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_dsi.c
drivers/gpu/drm/i915/intel_dsi.h
drivers/gpu/drm/i915/intel_dsi_pll.c [new file with mode: 0644]