net/mlx5: HWS, fix definer's HWS_SET32 macro for negative offset
authorYevgeny Kliteynik <kliteyn@nvidia.com>
Thu, 2 Jan 2025 18:14:10 +0000 (20:14 +0200)
committerJakub Kicinski <kuba@kernel.org>
Tue, 7 Jan 2025 00:33:41 +0000 (16:33 -0800)
commitbe482f1d10da781db9445d2753c1e3f1fd82babf
treef2d5b5d0f42004c62072b23d4ae4ae281ea9cdae
parent2f851d1702dcd1b7124aef1680a091ff3f2ef791
net/mlx5: HWS, fix definer's HWS_SET32 macro for negative offset

When bit offset for HWS_SET32 macro is negative,
UBSAN complains about the shift-out-of-bounds:

  UBSAN: shift-out-of-bounds in
  drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c:177:2
  shift exponent -8 is negative

Fixes: 74a778b4a63f ("net/mlx5: HWS, added definers handling")
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250102181415.1477316-12-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c