drm/i915/icl: Factor out combo PHY lane power setup helper
authorImre Deak <imre.deak@intel.com>
Thu, 25 Apr 2019 18:52:52 +0000 (21:52 +0300)
committerImre Deak <imre.deak@intel.com>
Thu, 2 May 2019 14:15:09 +0000 (17:15 +0300)
commitbd60a562906b2dfa6db4e9165c1498ea25db0587
treef179c259905bccc94b368ef3d82f11446be7e5ce
parent3904fb78a80da64d7fd1a4f270725a6d4272c86f
drm/i915/icl: Factor out combo PHY lane power setup helper

Factor out the combo PHY lane power configuration code to a separate
helper; it will be also needed by the next patch adding the same
configuration for DDI ports.

Add support for DDI ports and lane reversal as preparation for the next
patch.

The PWR_DOWN_LN_1 value is unspecified in the BSpec register description
so remove it.

v2:
- Fix up the wrong assumption that the encodings are the same for DDI
  and DSI ports. (Jani)
v3:
- Use intel_ instead of icl_ prefix. (Jani)
- Add required headers to intel_combo_phy.h after the upstream header
  refactoring.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com> (v2)
Link: https://patchwork.freedesktop.org/patch/msgid/20190425185253.3197-1-imre.deak@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/icl_dsi.c
drivers/gpu/drm/i915/intel_combo_phy.c
drivers/gpu/drm/i915/intel_combo_phy.h