clk: qcom: ipq8074: add remaining PLL’s
authorAbhishek Sahu <absahu@codeaurora.org>
Wed, 13 Dec 2017 14:25:36 +0000 (19:55 +0530)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 22 Dec 2017 00:03:31 +0000 (16:03 -0800)
commitb8e7e519625ffff27eb3a0c46974ef7b404d092d
treeddb8c3a61b4c93d9a52d34068df3e3fb79a28359
parent8c1c2c5a9656ff17dc91da0a1dbe075fb912ba9b
clk: qcom: ipq8074: add remaining PLL’s

- GPLL2, GPLL4 and GPLL6 are general PLL clocks and parent
  for all core peripherals.
- UBI PLL is mainly used by NSS (Network Switching System).
  IPQ8074 has 2 instances of NSS UBI cores and UBI PLL will
  be used to control the core frequency.
- NSS Crypto PLL is mainly used by NSS Crypto Engine which
  supports the multiple cryptographic algorithm used in
  Ethernet.
- IPQ8074 frequency plan does not require change in PLL post
  dividers so marked the same as read-only.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/qcom/gcc-ipq8074.c